From: Chen Zheng <czhengsz@cn.ibm.com>
Date: Mon, 8 Apr 2019 12:08:03 +0000 (+0000)
Subject: [InstCombine] sdiv exact flag fixup.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=ef1e756a76a3155af54eb487e41db2b789ba4df5;p=llvm

[InstCombine] sdiv exact flag fixup.

Differential Revision: https://reviews.llvm.org/D60396


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357904 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 6d743a26098..d5a36e025f6 100644
--- a/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1693,8 +1693,11 @@ Instruction *InstCombiner::visitSub(BinaryOperator &I) {
 
     // 0 - (X sdiv C)  -> (X sdiv -C)  provided the negation doesn't overflow.
     if (match(Op1, m_SDiv(m_Value(X), m_Constant(C))) && match(Op0, m_Zero()) &&
-        C->isNotMinSignedValue() && !C->isOneValue())
-      return BinaryOperator::CreateSDiv(X, ConstantExpr::getNeg(C));
+        C->isNotMinSignedValue() && !C->isOneValue()) {
+      auto *BO = BinaryOperator::CreateSDiv(X, ConstantExpr::getNeg(C));
+      BO->setIsExact(cast<BinaryOperator>(Op1)->isExact());
+      return BO;
+    }
 
     // 0 - (X << Y)  -> (-X << Y)   when X is freely negatable.
     if (match(Op1, m_Shl(m_Value(X), m_Value(Y))) && match(Op0, m_Zero()))
diff --git a/test/Transforms/InstCombine/div.ll b/test/Transforms/InstCombine/div.ll
index 1bfa980d93c..de1013286d9 100644
--- a/test/Transforms/InstCombine/div.ll
+++ b/test/Transforms/InstCombine/div.ll
@@ -762,7 +762,7 @@ define <2 x i8> @udiv_common_factor_not_nuw_vec(<2 x i8> %x, <2 x i8> %y, <2 x i
 
 define i32 @test_exact_nsw_exact(i32 %x) {
 ; CHECK-LABEL: @test_exact_nsw_exact(
-; CHECK-NEXT:    [[NEG:%.*]] = sdiv i32 [[X:%.*]], -3
+; CHECK-NEXT:    [[NEG:%.*]] = sdiv exact i32 [[X:%.*]], -3
 ; CHECK-NEXT:    ret i32 [[NEG]]
 ;
   %div = sdiv exact i32 %x, 3
@@ -772,7 +772,7 @@ define i32 @test_exact_nsw_exact(i32 %x) {
 
 define <2 x i64> @test_exact_vec(<2 x i64> %x) {
 ; CHECK-LABEL: @test_exact_vec(
-; CHECK-NEXT:    [[NEG:%.*]] = sdiv <2 x i64> [[X:%.*]], <i64 -3, i64 -4>
+; CHECK-NEXT:    [[NEG:%.*]] = sdiv exact <2 x i64> [[X:%.*]], <i64 -3, i64 -4>
 ; CHECK-NEXT:    ret <2 x i64> [[NEG]]
 ;
   %div = sdiv exact <2 x i64> %x, <i64 3, i64 4>
@@ -782,7 +782,7 @@ define <2 x i64> @test_exact_vec(<2 x i64> %x) {
 
 define i32 @test_exact_nonsw_exact(i32 %x) {
 ; CHECK-LABEL: @test_exact_nonsw_exact(
-; CHECK-NEXT:    [[NEG:%.*]] = sdiv i32 [[X:%.*]], -3
+; CHECK-NEXT:    [[NEG:%.*]] = sdiv exact i32 [[X:%.*]], -3
 ; CHECK-NEXT:    ret i32 [[NEG]]
 ;
   %div = sdiv exact i32 %x, 3
@@ -806,7 +806,7 @@ define i32 @test_exact_nonsw_noexact(i32 %x) {
 ; CHECK-NEXT:    ret i32 [[NEG]]
 ;
   %div = sdiv i32 %x, 3
-  %neg = sub nsw i32 0, %div
+  %neg = sub i32 0, %div
   ret i32 %neg
 }