From: Simon Pilgrim Date: Thu, 11 Apr 2019 13:30:38 +0000 (+0000) Subject: [X86] SimplifyDemandedVectorElts - add VPPERM support X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=ec7786cfeb09db53659a629dfb6d0986612d0dfd;p=llvm [X86] SimplifyDemandedVectorElts - add VPPERM support We need to add support for all variable shuffle mask ops, but VPPERM is the only one that already has test coverage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358165 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 190d5708324..223d0923c7f 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -33234,6 +33234,15 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode( return true; break; } + case X86ISD::VPPERM: { + // TODO - simplify other variable shuffle masks. + SDValue Mask = Op.getOperand(2); + APInt MaskUndef, MaskZero; + if (SimplifyDemandedVectorElts(Mask, DemandedElts, MaskUndef, MaskZero, TLO, + Depth + 1)) + return true; + break; + } case X86ISD::HADD: case X86ISD::HSUB: case X86ISD::FHADD: diff --git a/test/CodeGen/X86/oddshuffles.ll b/test/CodeGen/X86/oddshuffles.ll index 78f6611ed46..131535e61f9 100644 --- a/test/CodeGen/X86/oddshuffles.ll +++ b/test/CodeGen/X86/oddshuffles.ll @@ -1241,7 +1241,7 @@ define void @interleave_24i16_in(<24 x i16>* %p, <8 x i16>* %q1, <8 x i16>* %q2, ; XOP-NEXT: vmovdqu (%rsi), %xmm0 ; XOP-NEXT: vmovdqu (%rdx), %xmm1 ; XOP-NEXT: vmovdqu (%rcx), %xmm2 -; XOP-NEXT: vpperm {{.*#+}} xmm3 = xmm0[4,5,6,7],xmm1[6,7],xmm0[6,7,8,9],xmm1[8,9],xmm0[8,9,10,11] +; XOP-NEXT: vpperm {{.*#+}} xmm3 = xmm0[u,u,6,7],xmm1[6,7],xmm0[u,u,8,9],xmm1[8,9],xmm0[u,u,10,11] ; XOP-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,2,2] ; XOP-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm3[1,2],xmm4[3],xmm3[4,5],xmm4[6],xmm3[7] ; XOP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]