From: Michael LeMay <michael.lemay@intel.com>
Date: Mon, 19 Dec 2016 21:02:41 +0000 (+0000)
Subject: [TargetInstrInfo] replace redundant expression in getMemOpBaseRegImmOfs
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=eaf3712d06ee4d2eb53e908cdc6d08365adb7b08;p=llvm

[TargetInstrInfo] replace redundant expression in getMemOpBaseRegImmOfs

Summary:
The expression for computing the return value of getMemOpBaseRegImmOfs has only
one possible value. The other value would result in a return earlier in the
function. This patch replaces the expression with its only possible value.

Reviewers: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27437

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290133 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 8481417b009..4a6d337a9bd 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -5969,8 +5969,7 @@ bool X86InstrInfo::getMemOpBaseRegImmOfs(MachineInstr &MemOp, unsigned &BaseReg,
 
   Offset = DispMO.getImm();
 
-  return MemOp.getOperand(MemRefBegin + X86::AddrIndexReg).getReg() ==
-         X86::NoRegister;
+  return true;
 }
 
 static unsigned getStoreRegOpcode(unsigned SrcReg,