From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Fri, 13 Sep 2019 04:12:12 +0000 (+0000)
Subject: AMDGPU/GlobalISel: Fix assert on multi-return side effect intrinsics
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e93fcf568454098085e447bf64f76c31606efa16;p=llvm

AMDGPU/GlobalISel: Fix assert on multi-return side effect intrinsics

llvm.amdgcn.else hits this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371812 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index c1c515ab4af..23ca49b8a84 100644
--- a/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -731,7 +731,7 @@ bool AMDGPUInstructionSelector::selectG_INTRINSIC_W_SIDE_EFFECTS(
   MachineFunction *MF = BB->getParent();
   MachineRegisterInfo &MRI = MF->getRegInfo();
 
-  unsigned IntrinsicID = I.getOperand(0).getIntrinsicID();
+  unsigned IntrinsicID = I.getIntrinsicID();
   switch (IntrinsicID) {
   case Intrinsic::amdgcn_exp: {
     int64_t Tgt = getConstant(MRI.getVRegDef(I.getOperand(1).getReg()));