From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Mon, 14 Jan 2019 15:43:34 +0000 (+0000)
Subject: [DAGCombiner] Add (sub_sat x, x) -> 0 combine
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e84a99a487d6fb8b97b99e577870bb742bb26a46;p=llvm

[DAGCombiner] Add (sub_sat x, x) -> 0 combine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351073 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d564bda7987..b1770920f06 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2800,6 +2800,10 @@ SDValue DAGCombiner::visitSUBSAT(SDNode *N) {
   if (N0.isUndef() || N1.isUndef())
     return DAG.getConstant(0, DL, VT);
 
+  // fold (sub_sat x, x) -> 0
+  if (N0 == N1)
+    return DAG.getConstant(0, DL, VT);
+
   if (DAG.isConstantIntBuildVectorOrConstantInt(N0) &&
       DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
     // fold (sub_sat c1, c2) -> c3
diff --git a/test/CodeGen/X86/combine-sub-ssat.ll b/test/CodeGen/X86/combine-sub-ssat.ll
index d68a1deef8e..4cce35552ec 100644
--- a/test/CodeGen/X86/combine-sub-ssat.ll
+++ b/test/CodeGen/X86/combine-sub-ssat.ll
@@ -96,12 +96,6 @@ define i32 @combine_self_i32(i32 %a0) {
 ; CHECK-LABEL: combine_self_i32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    movl %edi, %ecx
-; CHECK-NEXT:    subl %edi, %ecx
-; CHECK-NEXT:    setns %al
-; CHECK-NEXT:    addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT:    subl %edi, %edi
-; CHECK-NEXT:    cmovnol %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 %a0)
   ret i32 %1
@@ -110,12 +104,12 @@ define i32 @combine_self_i32(i32 %a0) {
 define <8 x i16> @combine_self_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_self_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    psubsw %xmm0, %xmm0
+; SSE-NEXT:    xorps %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_self_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpsubsw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
   ret <8 x i16> %1
diff --git a/test/CodeGen/X86/combine-sub-usat.ll b/test/CodeGen/X86/combine-sub-usat.ll
index ee519194207..e26d0d66799 100644
--- a/test/CodeGen/X86/combine-sub-usat.ll
+++ b/test/CodeGen/X86/combine-sub-usat.ll
@@ -96,8 +96,6 @@ define i32 @combine_self_i32(i32 %a0) {
 ; CHECK-LABEL: combine_self_i32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    subl %edi, %edi
-; CHECK-NEXT:    cmovael %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 %a0)
   ret i32 %1
@@ -106,12 +104,12 @@ define i32 @combine_self_i32(i32 %a0) {
 define <8 x i16> @combine_self_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_self_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    psubusw %xmm0, %xmm0
+; SSE-NEXT:    xorps %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_self_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpsubusw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %1 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
   ret <8 x i16> %1