From: Jacob Baungard Hansen <jacob.hansen@gaisler.com>
Date: Thu, 24 Nov 2016 08:53:28 +0000 (+0000)
Subject: TableGen: Allow signed immediates for instruction aliases
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e6ee79fbc50921019285d4bb853944b523b1a809;p=llvm

TableGen: Allow signed immediates for instruction aliases

Patch by Daniel Cederman.

Reviewers: stoklund, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D27046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287856 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 50615689d66..70cea1fb930 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -879,7 +879,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
           IAP.addCond(Op + ".isImm()");
 
           Cond = Op + ".getImm() == " +
-                 llvm::utostr(CGA.ResultOperands[i].getImm());
+                 llvm::itostr(CGA.ResultOperands[i].getImm());
           IAP.addCond(Cond);
           break;
         }