From: Roman Lebedev <lebedev.ri@gmail.com>
Date: Mon, 16 Jul 2018 20:10:46 +0000 (+0000)
Subject: [NFC][InstCombine] Fine-tune 'check for [no] signed truncation' tests
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e5c7b32694a7580b9e7fcd0f1654ac205fc4eea0;p=llvm

[NFC][InstCombine] Fine-tune 'check for [no] signed truncation' tests

We are using i8 for these tests, and shifting by 4,
which is exactly the half of i8.

But as it is seen from the proofs https://rise4fun.com/Alive/mgu
KeptBits = bitwidth(%x) - MaskedBits,
so with using shifts by 4, we are not really testing that
we actually properly handle the other cases with shifts not by half...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337208 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll b/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
index 306d3c917c8..e45ed180362 100644
--- a/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
+++ b/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
@@ -15,12 +15,12 @@
 
 define i1 @p0(i8 %x) {
 ; CHECK-LABEL: @p0(
-; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X:%.*]], 8
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 16
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp eq i8 %tmp1, %x
   ret i1 %tmp2
 }
@@ -31,64 +31,64 @@ define i1 @p0(i8 %x) {
 
 define <2 x i1> @p1_vec_splat(<2 x i8> %x) {
 ; CHECK-LABEL: @p1_vec_splat(
-; CHECK-NEXT:    [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 8, i8 8>
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 16, i8 16>
+; CHECK-NEXT:    [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 4, i8 4>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 8, i8 8>
 ; CHECK-NEXT:    ret <2 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <2 x i8> %x, <i8 4, i8 4>
-  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 4, i8 4>
+  %tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
+  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 5>
   %tmp2 = icmp eq <2 x i8> %tmp1, %x
   ret <2 x i1> %tmp2
 }
 
 define <2 x i1> @p2_vec_nonsplat(<2 x i8> %x) {
 ; CHECK-LABEL: @p2_vec_nonsplat(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 4, i8 5>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 4, i8 5>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 6>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 6>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <2 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <2 x i8> %x, <i8 4, i8 5>
-  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 4, i8 5>
+  %tmp0 = shl <2 x i8> %x, <i8 5, i8 6>
+  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 6>
   %tmp2 = icmp eq <2 x i8> %tmp1, %x
   ret <2 x i1> %tmp2
 }
 
 define <3 x i1> @p3_vec_undef0(<3 x i8> %x) {
 ; CHECK-LABEL: @p3_vec_undef0(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 4, i8 undef, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 4, i8 4, i8 4>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 undef, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 5, i8 5>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <3 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <3 x i8> %x, <i8 4, i8 undef, i8 4>
-  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 4, i8 4, i8 4>
+  %tmp0 = shl <3 x i8> %x, <i8 5, i8 undef, i8 5>
+  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 5, i8 5>
   %tmp2 = icmp eq <3 x i8> %tmp1, %x
   ret <3 x i1> %tmp2
 }
 
 define <3 x i1> @p4_vec_undef1(<3 x i8> %x) {
 ; CHECK-LABEL: @p4_vec_undef1(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 4, i8 4, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 4, i8 undef, i8 4>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 5, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <3 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <3 x i8> %x, <i8 4, i8 4, i8 4>
-  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 4, i8 undef, i8 4>
+  %tmp0 = shl <3 x i8> %x, <i8 5, i8 5, i8 5>
+  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
   %tmp2 = icmp eq <3 x i8> %tmp1, %x
   ret <3 x i1> %tmp2
 }
 
 define <3 x i1> @p5_vec_undef2(<3 x i8> %x) {
 ; CHECK-LABEL: @p5_vec_undef2(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 4, i8 undef, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 4, i8 undef, i8 4>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 undef, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <3 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <3 x i8> %x, <i8 4, i8 undef, i8 4>
-  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 4, i8 undef, i8 4>
+  %tmp0 = shl <3 x i8> %x, <i8 5, i8 undef, i8 5>
+  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
   %tmp2 = icmp eq <3 x i8> %tmp1, %x
   ret <3 x i1> %tmp2
 }
@@ -102,13 +102,13 @@ declare i8 @gen8()
 define i1 @c0() {
 ; CHECK-LABEL: @c0(
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 8
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 16
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %x = call i8 @gen8()
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp eq i8 %x, %tmp1 ; swapped order
   ret i1 %tmp2
 }
@@ -121,29 +121,29 @@ declare void @use8(i8)
 
 define i1 @n_oneuse0(i8 %x) {
 ; CHECK-LABEL: @n_oneuse0(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP0]])
-; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 8
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 16
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
+  %tmp0 = shl i8 %x, 5
   call void @use8(i8 %tmp0)
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp eq i8 %tmp1, %x
   ret i1 %tmp2
 }
 
 define i1 @n_oneuse1(i8 %x) {
 ; CHECK-LABEL: @n_oneuse1(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP1]])
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   call void @use8(i8 %tmp1)
   %tmp2 = icmp eq i8 %tmp1, %x
   ret i1 %tmp2
@@ -151,16 +151,16 @@ define i1 @n_oneuse1(i8 %x) {
 
 define i1 @n_oneuse2(i8 %x) {
 ; CHECK-LABEL: @n_oneuse2(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP0]])
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP1]])
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
+  %tmp0 = shl i8 %x, 5
   call void @use8(i8 %tmp0)
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp1 = ashr exact i8 %tmp0, 5
   call void @use8(i8 %tmp1)
   %tmp2 = icmp eq i8 %tmp1, %x
   ret i1 %tmp2
@@ -172,50 +172,50 @@ define i1 @n_oneuse2(i8 %x) {
 
 define i1 @n0(i8 %x) {
 ; CHECK-LABEL: @n0(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
 ; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 3
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 3 ; not 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 3 ; not 5
   %tmp2 = icmp eq i8 %tmp1, %x
   ret i1 %tmp2
 }
 
 define i1 @n1(i8 %x) {
 ; CHECK-LABEL: @n1(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i8 [[X:%.*]], 16
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i8 [[X:%.*]], 8
 ; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = lshr exact i8 %tmp0, 4 ; not ashr
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = lshr exact i8 %tmp0, 5 ; not ashr
   %tmp2 = icmp eq i8 %tmp1, %x
   ret i1 %tmp2
 }
 
 define i1 @n2(i8 %x, i8 %y) {
 ; CHECK-LABEL: @n2(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[Y:%.*]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp eq i8 %tmp1, %y ; not %x
   ret i1 %tmp2
 }
 
 define <2 x i1> @n3_vec_nonsplat(<2 x i8> %x) {
 ; CHECK-LABEL: @n3_vec_nonsplat(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 4, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 4, i8 3>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 3>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <2 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <2 x i8> %x, <i8 4, i8 4>
-  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 4, i8 3> ; 3 instead of 4
+  %tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
+  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 3> ; 3 instead of 5
   %tmp2 = icmp eq <2 x i8> %tmp1, %x
   ret <2 x i1> %tmp2
 }
diff --git a/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll b/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
index 5a3345cf898..0d5a98dbaf0 100644
--- a/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
+++ b/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
@@ -15,12 +15,12 @@
 
 define i1 @p0(i8 %x) {
 ; CHECK-LABEL: @p0(
-; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X:%.*]], 8
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 15
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp ne i8 %tmp1, %x
   ret i1 %tmp2
 }
@@ -31,64 +31,64 @@ define i1 @p0(i8 %x) {
 
 define <2 x i1> @p1_vec_splat(<2 x i8> %x) {
 ; CHECK-LABEL: @p1_vec_splat(
-; CHECK-NEXT:    [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 8, i8 8>
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt <2 x i8> [[TMP1]], <i8 15, i8 15>
+; CHECK-NEXT:    [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 4, i8 4>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt <2 x i8> [[TMP1]], <i8 7, i8 7>
 ; CHECK-NEXT:    ret <2 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <2 x i8> %x, <i8 4, i8 4>
-  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 4, i8 4>
+  %tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
+  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 5>
   %tmp2 = icmp ne <2 x i8> %tmp1, %x
   ret <2 x i1> %tmp2
 }
 
 define <2 x i1> @p2_vec_nonsplat(<2 x i8> %x) {
 ; CHECK-LABEL: @p2_vec_nonsplat(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 4, i8 5>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 4, i8 5>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 6>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 6>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <2 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <2 x i8> %x, <i8 4, i8 5>
-  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 4, i8 5>
+  %tmp0 = shl <2 x i8> %x, <i8 5, i8 6>
+  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 6>
   %tmp2 = icmp ne <2 x i8> %tmp1, %x
   ret <2 x i1> %tmp2
 }
 
 define <3 x i1> @p3_vec_undef0(<3 x i8> %x) {
 ; CHECK-LABEL: @p3_vec_undef0(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 4, i8 undef, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 4, i8 4, i8 4>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 undef, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 5, i8 5>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <3 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <3 x i8> %x, <i8 4, i8 undef, i8 4>
-  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 4, i8 4, i8 4>
+  %tmp0 = shl <3 x i8> %x, <i8 5, i8 undef, i8 5>
+  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 5, i8 5>
   %tmp2 = icmp ne <3 x i8> %tmp1, %x
   ret <3 x i1> %tmp2
 }
 
 define <3 x i1> @p4_vec_undef1(<3 x i8> %x) {
 ; CHECK-LABEL: @p4_vec_undef1(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 4, i8 4, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 4, i8 undef, i8 4>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 5, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <3 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <3 x i8> %x, <i8 4, i8 4, i8 4>
-  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 4, i8 undef, i8 4>
+  %tmp0 = shl <3 x i8> %x, <i8 5, i8 5, i8 5>
+  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
   %tmp2 = icmp ne <3 x i8> %tmp1, %x
   ret <3 x i1> %tmp2
 }
 
 define <3 x i1> @p5_vec_undef2(<3 x i8> %x) {
 ; CHECK-LABEL: @p5_vec_undef2(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 4, i8 undef, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 4, i8 undef, i8 4>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 undef, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <3 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <3 x i8> %x, <i8 4, i8 undef, i8 4>
-  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 4, i8 undef, i8 4>
+  %tmp0 = shl <3 x i8> %x, <i8 5, i8 undef, i8 5>
+  %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
   %tmp2 = icmp ne <3 x i8> %tmp1, %x
   ret <3 x i1> %tmp2
 }
@@ -102,13 +102,13 @@ declare i8 @gen8()
 define i1 @c0() {
 ; CHECK-LABEL: @c0(
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 8
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 15
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %x = call i8 @gen8()
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp ne i8 %x, %tmp1 ; swapped order
   ret i1 %tmp2
 }
@@ -121,29 +121,29 @@ declare void @use8(i8)
 
 define i1 @n_oneuse0(i8 %x) {
 ; CHECK-LABEL: @n_oneuse0(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP0]])
-; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 8
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 15
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
+  %tmp0 = shl i8 %x, 5
   call void @use8(i8 %tmp0)
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp ne i8 %tmp1, %x
   ret i1 %tmp2
 }
 
 define i1 @n_oneuse1(i8 %x) {
 ; CHECK-LABEL: @n_oneuse1(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP1]])
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   call void @use8(i8 %tmp1)
   %tmp2 = icmp ne i8 %tmp1, %x
   ret i1 %tmp2
@@ -151,16 +151,16 @@ define i1 @n_oneuse1(i8 %x) {
 
 define i1 @n_oneuse2(i8 %x) {
 ; CHECK-LABEL: @n_oneuse2(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP0]])
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
 ; CHECK-NEXT:    call void @use8(i8 [[TMP1]])
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
+  %tmp0 = shl i8 %x, 5
   call void @use8(i8 %tmp0)
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp1 = ashr exact i8 %tmp0, 5
   call void @use8(i8 %tmp1)
   %tmp2 = icmp ne i8 %tmp1, %x
   ret i1 %tmp2
@@ -172,50 +172,50 @@ define i1 @n_oneuse2(i8 %x) {
 
 define i1 @n0(i8 %x) {
 ; CHECK-LABEL: @n0(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
 ; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 3
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 3 ; not 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 3 ; not 5
   %tmp2 = icmp ne i8 %tmp1, %x
   ret i1 %tmp2
 }
 
 define i1 @n1(i8 %x) {
 ; CHECK-LABEL: @n1(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], 15
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], 7
 ; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = lshr exact i8 %tmp0, 4 ; not ashr
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = lshr exact i8 %tmp0, 5 ; not ashr
   %tmp2 = icmp ne i8 %tmp1, %x
   ret i1 %tmp2
 }
 
 define i1 @n2(i8 %x, i8 %y) {
 ; CHECK-LABEL: @n2(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 4
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[Y:%.*]]
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
-  %tmp0 = shl i8 %x, 4
-  %tmp1 = ashr exact i8 %tmp0, 4
+  %tmp0 = shl i8 %x, 5
+  %tmp1 = ashr exact i8 %tmp0, 5
   %tmp2 = icmp ne i8 %tmp1, %y ; not %x
   ret i1 %tmp2
 }
 
 define <2 x i1> @n3_vec_nonsplat(<2 x i8> %x) {
 ; CHECK-LABEL: @n3_vec_nonsplat(
-; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 4, i8 4>
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 4, i8 3>
+; CHECK-NEXT:    [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 5>
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 3>
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret <2 x i1> [[TMP2]]
 ;
-  %tmp0 = shl <2 x i8> %x, <i8 4, i8 4>
-  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 4, i8 3> ; 3 instead of 4
+  %tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
+  %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 3> ; 3 instead of 5
   %tmp2 = icmp ne <2 x i8> %tmp1, %x
   ret <2 x i1> %tmp2
 }