From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sun, 10 Dec 2017 00:12:57 +0000 (+0000)
Subject: [X86] Tag TLS instructions as system scheduler classes
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e3e57e9a4485f60e604355ca5e72ff6c2e388849;p=llvm

[X86] Tag TLS instructions as system scheduler classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320274 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td
index 8b298d27ce8..51d6bc464eb 100644
--- a/lib/Target/X86/X86InstrCompiler.td
+++ b/lib/Target/X86/X86InstrCompiler.td
@@ -464,6 +464,7 @@ let Defs = [RCX,RDI], isCodeGenOnly = 1 in {
 //===----------------------------------------------------------------------===//
 // Thread Local Storage Instructions
 //
+let SchedRW = [WriteSystem] in {
 
 // ELF TLS Support
 // All calls clobber the non-callee saved registers. ESP is marked as
@@ -529,7 +530,7 @@ def TLSCall_64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
                   "# TLSCall_64",
                   [(X86TLSCall addr:$sym)]>,
                   Requires<[In64BitMode]>;
-
+} // SchedRW
 
 //===----------------------------------------------------------------------===//
 // Conditional Move Pseudo Instructions