From: Chandler Carruth <chandlerc@gmail.com>
Date: Fri, 24 Aug 2018 04:45:04 +0000 (+0000)
Subject: [AVR] Fix inline asm calls now that the addrspace(0) there is explicit.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e24ad3390ffe53acb284a1a6288bad22134bf80a;p=clang

[AVR] Fix inline asm calls now that the addrspace(0) there is explicit.

This updates the test case for r340519 so it should pass again. r340522
only got some of the AVR tests that needed an update.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@340596 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/avr-inline-asm-constraints.c b/test/CodeGen/avr-inline-asm-constraints.c
index f1bfbac389..c659953ca6 100644
--- a/test/CodeGen/avr-inline-asm-constraints.c
+++ b/test/CodeGen/avr-inline-asm-constraints.c
@@ -4,121 +4,121 @@
 int data;
 
 void a() {
-  // CHECK: call void asm sideeffect "add r5, $0", "a"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "a"(i16 %0)
   asm("add r5, %0" :: "a"(data));
 }
 
 void b() {
-  // CHECK: call void asm sideeffect "add r5, $0", "b"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "b"(i16 %0)
   asm("add r5, %0" :: "b"(data));
 }
 
 void d() {
-  // CHECK: call void asm sideeffect "add r5, $0", "d"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "d"(i16 %0)
   asm("add r5, %0" :: "d"(data));
 }
 
 void l() {
-  // CHECK: call void asm sideeffect "add r5, $0", "l"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "l"(i16 %0)
   asm("add r5, %0" :: "l"(data));
 }
 
 void e() {
-  // CHECK: call void asm sideeffect "add r5, $0", "e"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "e"(i16 %0)
   asm("add r5, %0" :: "e"(data));
 }
 
 void q() {
-  // CHECK: call void asm sideeffect "add r5, $0", "q"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "q"(i16 %0)
   asm("add r5, %0" :: "q"(data));
 }
 
 void r() {
-  // CHECK: call void asm sideeffect "add r5, $0", "r"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "r"(i16 %0)
   asm("add r5, %0" :: "r"(data));
 }
 
 void w() {
-  // CHECK: call void asm sideeffect "add r5, $0", "w"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "w"(i16 %0)
   asm("add r5, %0" :: "w"(data));
 }
 
 void t() {
-  // CHECK: call void asm sideeffect "add r5, $0", "t"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "t"(i16 %0)
   asm("add r5, %0" :: "t"(data));
 }
 
 void x() {
-  // CHECK: call void asm sideeffect "add r5, $0", "x"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "x"(i16 %0)
   asm("add r5, %0" :: "x"(data));
 }
 
 void y() {
-  // CHECK: call void asm sideeffect "add r5, $0", "y"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "y"(i16 %0)
   asm("add r5, %0" :: "y"(data));
 }
 
 void z() {
-  // CHECK: call void asm sideeffect "add r5, $0", "z"(i16 %0)
+  // CHECK: call addrspace(0) void asm sideeffect "add r5, $0", "z"(i16 %0)
   asm("add r5, %0" :: "z"(data));
 }
 
 void I() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "I"(i16 50)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "I"(i16 50)
   asm("subi r30, %0" :: "I"(50));
 }
 
 void J() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "J"(i16 -50)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "J"(i16 -50)
   asm("subi r30, %0" :: "J"(-50));
 }
 
 void K() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "K"(i16 2)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "K"(i16 2)
   asm("subi r30, %0" :: "K"(2));
 }
 
 void L() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "L"(i16 0)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "L"(i16 0)
   asm("subi r30, %0" :: "L"(0));
 }
 
 void M() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "M"(i16 255)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "M"(i16 255)
   asm("subi r30, %0" :: "M"(255));
 }
 
 void O() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "O"(i16 16)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "O"(i16 16)
   asm("subi r30, %0" :: "O"(16));
 }
 
 void P() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "P"(i16 1)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "P"(i16 1)
   asm("subi r30, %0" :: "P"(1));
 }
 
 void R() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "R"(i16 -3)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "R"(i16 -3)
   asm("subi r30, %0" :: "R"(-3));
 }
 
 void G() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "G"(i16 50)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "G"(i16 50)
   asm("subi r30, %0" :: "G"(50));
 }
 
 void Q() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "Q"(i16 50)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "Q"(i16 50)
   asm("subi r30, %0" :: "Q"(50));
 }
 
 void ra() {
-  // CHECK: call void asm sideeffect "subi r30, $0", "ra"(i16 50)
+  // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "ra"(i16 50)
   asm("subi r30, %0" :: "ra"(50));
 }
 
 void ora() {
-  // CHECK: call i16 asm "subi r30, $0", "=ra"()
+  // CHECK: call addrspace(0) i16 asm "subi r30, $0", "=ra"()
   asm("subi r30, %0" : "=ra"(data));
 }