From: Dmitry Preobrazhensky Date: Wed, 29 Nov 2017 13:33:40 +0000 (+0000) Subject: [AMDGPU][MC][GFX9] Corrected mapping of GFX9 v_add/sub/subrev_u32 X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e211444e8b208100135b71fc37add1c3f029b278;p=llvm [AMDGPU][MC][GFX9] Corrected mapping of GFX9 v_add/sub/subrev_u32 When translating pseudo to MC, v_add/sub/subrev_u32 shall be mapped via a separate table as GFX8 has opcodes with the same names. These instructions shall also be labelled as renamed for pseudoToMCOpcode to handle them correctly. Reviewers: arsenm Differential Revision: https://reviews.llvm.org/D40550 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319311 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/AMDGPU/VOP2Instructions.td b/lib/Target/AMDGPU/VOP2Instructions.td index f870f511ba4..ef90b68db1a 100644 --- a/lib/Target/AMDGPU/VOP2Instructions.td +++ b/lib/Target/AMDGPU/VOP2Instructions.td @@ -128,15 +128,20 @@ class getVOP2Pat64 : LetDummies { multiclass VOP2Inst { + string revOp = opName, + bit GFX9Renamed = 0> { - def _e32 : VOP2_Pseudo , - Commutable_REV; + let renamedInGFX9 = GFX9Renamed in { + + def _e32 : VOP2_Pseudo , + Commutable_REV; + + def _e64 : VOP3_Pseudo .ret>, + Commutable_REV; - def _e64 : VOP3_Pseudo .ret>, - Commutable_REV; + def _sdwa : VOP2_SDWA_Pseudo ; - def _sdwa : VOP2_SDWA_Pseudo ; + } } multiclass VOP2bInst ; -defm V_SUB_U32 : VOP2Inst <"v_sub_u32", VOP_I32_I32_I32>; -defm V_SUBREV_U32 : VOP2Inst <"v_subrev_u32", VOP_I32_I32_I32, null_frag, "v_sub_u32">; +defm V_ADD_U32 : VOP2Inst <"v_add_u32", VOP_I32_I32_I32, null_frag, "v_add_u32", 1>; +defm V_SUB_U32 : VOP2Inst <"v_sub_u32", VOP_I32_I32_I32, null_frag, "v_sub_u32", 1>; +defm V_SUBREV_U32 : VOP2Inst <"v_subrev_u32", VOP_I32_I32_I32, null_frag, "v_sub_u32", 1>; } } // End isCommutable = 1