From: Sanjay Patel <spatel@rotateright.com>
Date: Fri, 10 Jun 2016 20:33:50 +0000 (+0000)
Subject: [x86] enable bitcasted fabs/fneg transforms
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e208b3790dc4fd46c13682700f6db1efc1094e5f;p=llvm

[x86] enable bitcasted fabs/fneg transforms

The vector cases don't change because we already have folds in X86ISelLowering
to look through and remove bitcasts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272427 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index c6733467a4a..fd6d5f5ae8d 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -758,6 +758,10 @@ namespace llvm {
 
     bool isCheapToSpeculateCtlz() const override;
 
+    bool hasBitPreservingFPLogic(EVT VT) const override {
+      return VT == MVT::f32 || VT == MVT::f64 || VT.isVector();
+    }
+
     bool hasAndNotCompare(SDValue Y) const override;
 
     /// Return the value type to use for ISD::SETCC.
diff --git a/test/CodeGen/X86/fp-logic.ll b/test/CodeGen/X86/fp-logic.ll
index b5f1349cada..9ab6751d654 100644
--- a/test/CodeGen/X86/fp-logic.ll
+++ b/test/CodeGen/X86/fp-logic.ll
@@ -265,8 +265,7 @@ define float @movmsk(float %x) {
 define double @bitcast_fabs(double %x) {
 ; CHECK-LABEL: bitcast_fabs:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
-; CHECK-NEXT:    andpd %xmm1, %xmm0
+; CHECK-NEXT:    andpd {{.*}}(%rip), %xmm0
 ; CHECK-NEXT:    retq
 ;
   %bc1 = bitcast double %x to i64
@@ -278,8 +277,7 @@ define double @bitcast_fabs(double %x) {
 define float @bitcast_fneg(float %x) {
 ; CHECK-LABEL: bitcast_fneg:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT:    xorps %xmm1, %xmm0
+; CHECK-NEXT:    xorps {{.*}}(%rip), %xmm0
 ; CHECK-NEXT:    retq
 ;
   %bc1 = bitcast float %x to i32