From: David Blaikie Date: Tue, 24 Oct 2017 21:29:16 +0000 (+0000) Subject: HexagonDepTimingClasses.h: Don't mark header functions as file local X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e186a09f148cc66d3cc897873842208b1828f95d;p=llvm HexagonDepTimingClasses.h: Don't mark header functions as file local git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316508 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Hexagon/HexagonDepTimingClasses.h b/lib/Target/Hexagon/HexagonDepTimingClasses.h index 52963034543..2a3fb832733 100644 --- a/lib/Target/Hexagon/HexagonDepTimingClasses.h +++ b/lib/Target/Hexagon/HexagonDepTimingClasses.h @@ -6,8 +6,14 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +#ifndef TARGET_HEXAGON_HEXAGON_DEP_TIMING_CLASSES_H +#define TARGET_HEXAGON_HEXAGON_DEP_TIMING_CLASSES_H -static bool is_TC3x(unsigned SchedClass) { +#include "HexagonInstrInfo.h" + +namespace llvm { + +inline bool is_TC3x(unsigned SchedClass) { switch (SchedClass) { case Hexagon::Sched::tc_1000eb10: case Hexagon::Sched::tc_2aaab1e0: @@ -30,7 +36,7 @@ static bool is_TC3x(unsigned SchedClass) { } } -static bool is_TC2early(unsigned SchedClass) { +inline bool is_TC2early(unsigned SchedClass) { switch (SchedClass) { case Hexagon::Sched::tc_35fb9d13: case Hexagon::Sched::tc_cbe45117: @@ -40,7 +46,7 @@ static bool is_TC2early(unsigned SchedClass) { } } -static bool is_TC4x(unsigned SchedClass) { +inline bool is_TC4x(unsigned SchedClass) { switch (SchedClass) { case Hexagon::Sched::tc_09c86199: case Hexagon::Sched::tc_2d1e6f5c: @@ -54,7 +60,7 @@ static bool is_TC4x(unsigned SchedClass) { } } -static bool is_TC2(unsigned SchedClass) { +inline bool is_TC2(unsigned SchedClass) { switch (SchedClass) { case Hexagon::Sched::tc_090485bb: case Hexagon::Sched::tc_1fe8323c: @@ -86,7 +92,7 @@ static bool is_TC2(unsigned SchedClass) { } } -static bool is_TC1(unsigned SchedClass) { +inline bool is_TC1(unsigned SchedClass) { switch (SchedClass) { case Hexagon::Sched::tc_07ac815d: case Hexagon::Sched::tc_1b6011fb: @@ -130,3 +136,6 @@ static bool is_TC1(unsigned SchedClass) { return false; } } +} // namespace llvm + +#endif