From: Saleem Abdulrasool Date: Thu, 17 Aug 2017 02:42:24 +0000 (+0000) Subject: ARM: mark CPSR as clobbered for Windows VLAs X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=e042428b3e1d69205ff422e0c328e28f67b3e465;p=llvm ARM: mark CPSR as clobbered for Windows VLAs When lowering a VLA, we emit a __chstk call. However, this call can internally clobber CPSR. We did not mark this register as an ImpDef, which could potentially allow a comparison to be hoisted above the call to `__chkstk`. In such a case, the CPSR could be clobbered, and the check invalidated. When the support was initially added, it seemed that the call would take care of preventing CPSR from being clobbered, but this is not the case. Mark the register as clobbered to fix a possible state corruption. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311061 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 778ed3b26d2..ff8491d2e62 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -8790,6 +8790,8 @@ ARMTargetLowering::EmitLowered__chkstk(MachineInstr &MI, .addReg(ARM::R4, RegState::Implicit | RegState::Kill) .addReg(ARM::R4, RegState::Implicit | RegState::Define) .addReg(ARM::R12, + RegState::Implicit | RegState::Define | RegState::Dead) + .addReg(ARM::CPSR, RegState::Implicit | RegState::Define | RegState::Dead); break; case CodeModel::Large: { @@ -8804,6 +8806,8 @@ ARMTargetLowering::EmitLowered__chkstk(MachineInstr &MI, .addReg(ARM::R4, RegState::Implicit | RegState::Kill) .addReg(ARM::R4, RegState::Implicit | RegState::Define) .addReg(ARM::R12, + RegState::Implicit | RegState::Define | RegState::Dead) + .addReg(ARM::CPSR, RegState::Implicit | RegState::Define | RegState::Dead); break; } diff --git a/test/CodeGen/ARM/Windows/vla-cpsr.ll b/test/CodeGen/ARM/Windows/vla-cpsr.ll new file mode 100644 index 00000000000..de0f0b68a4d --- /dev/null +++ b/test/CodeGen/ARM/Windows/vla-cpsr.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o /dev/null %s -print-machineinstrs=expand-isel-pseudos 2>&1 | FileCheck %s + +declare arm_aapcs_vfpcc void @g(i8*) local_unnamed_addr + +define arm_aapcs_vfpcc void @f(i32 %i) local_unnamed_addr { +entry: + %vla = alloca i8, i32 %i, align 1 + call arm_aapcs_vfpcc void @g(i8* nonnull %vla) + ret void +} + +; CHECK: tBL pred:14, pred:%noreg, , %LR, %SP, %R4, %R4, %R12, %CPSR +