From: Craig Topper <craig.topper@intel.com>
Date: Wed, 18 Jul 2018 07:31:30 +0000 (+0000)
Subject: [X86] Add test case for missed opportunity to commute vunpckhpd to enable use of... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=de4051f80c49301641134a4a6a8419c08f09ccc7;p=llvm

[X86] Add test case for missed opportunity to commute vunpckhpd to enable use of vmovlps to fold a load.

We do this transform for SSE, but not AVX or AVX512VL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337356 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/vector-shuffle-128-v2.ll b/test/CodeGen/X86/vector-shuffle-128-v2.ll
index 0869a6ac34a..4012910d3b5 100644
--- a/test/CodeGen/X86/vector-shuffle-128-v2.ll
+++ b/test/CodeGen/X86/vector-shuffle-128-v2.ll
@@ -1301,3 +1301,19 @@ define <2 x double> @shuffle_mem_v2f64_10(<2 x double>* %ptr) {
   %shuffle = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> <i32 1, i32 0>
   ret <2 x double> %shuffle
 }
+
+define <2 x double> @shuffle_mem_v2f64_31(<2 x double> %a, <2 x double>* %b) {
+; SSE-LABEL: shuffle_mem_v2f64_31:
+; SSE:       # %bb.0:
+; SSE-NEXT:    movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: shuffle_mem_v2f64_31:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vmovaps (%rdi), %xmm1
+; AVX-NEXT:    vunpckhpd {{.*#+}} xmm0 = xmm1[1],xmm0[1]
+; AVX-NEXT:    retq
+  %c = load <2 x double>, <2 x double>* %b
+  %f = shufflevector <2 x double> %a, <2 x double> %c, <2 x i32> <i32 3, i32 1>
+  ret <2 x double> %f
+}