From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Mon, 30 Oct 2017 17:24:40 +0000 (+0000)
Subject: [MC] Split out register def/use idx calls to make debugging simpler. NFCI.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=de321cd4ac252b56e14b162f6cb7fc7ab83f4c4f;p=llvm

[MC] Split out register def/use idx calls to make debugging simpler. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316927 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/MachineCombiner.cpp b/lib/CodeGen/MachineCombiner.cpp
index 3ffef682334..9fc990f5c24 100644
--- a/lib/CodeGen/MachineCombiner.cpp
+++ b/lib/CodeGen/MachineCombiner.cpp
@@ -161,9 +161,10 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
         assert(DefInstr &&
                "There must be a definition for a new virtual register");
         DepthOp = InstrDepth[II->second];
-        LatencyOp = TSchedModel.computeOperandLatency(
-            DefInstr, DefInstr->findRegisterDefOperandIdx(MO.getReg()),
-            InstrPtr, InstrPtr->findRegisterUseOperandIdx(MO.getReg()));
+        int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg());
+        int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg());
+        LatencyOp = TSchedModel.computeOperandLatency(DefInstr, DefIdx,
+                                                      InstrPtr, UseIdx);
       } else {
         MachineInstr *DefInstr = getOperandDef(MO);
         if (DefInstr) {