From: Matt Arsenault Date: Tue, 4 Apr 2017 18:43:11 +0000 (+0000) Subject: Verifier: Check some amdgpu calling convention restrictions X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=dce3b51aea56b17d182c779787984f2edac8e3d3;p=llvm Verifier: Check some amdgpu calling convention restrictions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299457 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/IR/Verifier.cpp b/lib/IR/Verifier.cpp index 4efb7a693b3..72e2ed3988b 100644 --- a/lib/IR/Verifier.cpp +++ b/lib/IR/Verifier.cpp @@ -2006,6 +2006,18 @@ void Verifier::visitFunction(const Function &F) { default: case CallingConv::C: break; + case CallingConv::AMDGPU_KERNEL: + case CallingConv::SPIR_KERNEL: + Assert(F.getReturnType()->isVoidTy(), + "Calling convention requires void return type", &F); + LLVM_FALLTHROUGH; + case CallingConv::AMDGPU_VS: + case CallingConv::AMDGPU_GS: + case CallingConv::AMDGPU_PS: + case CallingConv::AMDGPU_CS: + Assert(!F.hasStructRetAttr(), + "Calling convention does not allow sret", &F); + LLVM_FALLTHROUGH; case CallingConv::Fast: case CallingConv::Cold: case CallingConv::Intel_OCL_BI: diff --git a/test/CodeGen/AMDGPU/early-inline.ll b/test/CodeGen/AMDGPU/early-inline.ll index db397d9e11b..c871d54bec7 100644 --- a/test/CodeGen/AMDGPU/early-inline.ll +++ b/test/CodeGen/AMDGPU/early-inline.ll @@ -17,8 +17,9 @@ entry: ; CHECK: mul i32 ; CHECK-NOT: call i32 -define amdgpu_kernel i32 @caller(i32 %x) { +define amdgpu_kernel void @caller(i32 %x) { entry: %res = call i32 @callee(i32 %x) - ret i32 %res + store volatile i32 %res, i32 addrspace(1)* undef + ret void } diff --git a/test/Verifier/amdgpu-cc.ll b/test/Verifier/amdgpu-cc.ll new file mode 100644 index 00000000000..68c7f309b6e --- /dev/null +++ b/test/Verifier/amdgpu-cc.ll @@ -0,0 +1,55 @@ +; RUN: not llvm-as < %s 2>&1 | FileCheck %s + +; CHECK: Calling convention requires void return type +; CHECK-NEXT: i32 ()* @nonvoid_cc_amdgpu_kernel +define amdgpu_kernel i32 @nonvoid_cc_amdgpu_kernel() { + ret i32 0 +} + +; CHECK: Calling convention does not support varargs or perfect forwarding! +; CHECK-NEXT: void (...)* @varargs_amdgpu_kernel +define amdgpu_kernel void @varargs_amdgpu_kernel(...) { + ret void +} + +; CHECK: Calling convention does not allow sret +; CHECK-NEXT: void (i32*)* @sret_cc_amdgpu_kernel +define amdgpu_kernel void @sret_cc_amdgpu_kernel(i32* sret %ptr) { + ret void +} + +; CHECK: Calling convention does not support varargs or perfect forwarding! +; CHECK-NEXT: void (...)* @varargs_amdgpu_vs +define amdgpu_vs void @varargs_amdgpu_vs(...) { + ret void +} + +; CHECK: Calling convention does not support varargs or perfect forwarding! +; CHECK-NEXT: void (...)* @varargs_amdgpu_gs +define amdgpu_gs void @varargs_amdgpu_gs(...) { + ret void +} + +; CHECK: Calling convention does not support varargs or perfect forwarding! +; CHECK-NEXT: void (...)* @varargs_amdgpu_ps +define amdgpu_ps void @varargs_amdgpu_ps(...) { + ret void +} + +; CHECK: Calling convention does not support varargs or perfect forwarding! +; CHECK-NEXT: void (...)* @varargs_amdgpu_cs +define amdgpu_cs void @varargs_amdgpu_cs(...) { + ret void +} + +; CHECK: Calling convention requires void return type +; CHECK-NEXT: i32 ()* @nonvoid_cc_spir_kernel +define spir_kernel i32 @nonvoid_cc_spir_kernel() { + ret i32 0 +} + +; CHECK: Calling convention does not support varargs or perfect forwarding! +; CHECK-NEXT: void (...)* @varargs_spir_kernel +define spir_kernel void @varargs_spir_kernel(...) { + ret void +}