From: Simon Pilgrim Date: Thu, 20 Dec 2018 13:50:12 +0000 (+0000) Subject: [InstCombine] Make x86 PADDS/PSUBS constant folding tests generic X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=dbbc397232055376f5416390e0cd79e1db568de9;p=llvm [InstCombine] Make x86 PADDS/PSUBS constant folding tests generic As discussed on D55894, this replaces the existing PADDS/PSUBUS intrinsics with the the sadd/ssub.sat generic intrinsics and moves the tests out of the x86 subfolder. PR40110 has been raised to fix the regression with constant folding vectors containing undef elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349759 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/Transforms/InstCombine/X86/x86-adds-subs.ll b/test/Transforms/InstCombine/X86/x86-adds-subs.ll deleted file mode 100644 index 87f0f6939f2..00000000000 --- a/test/Transforms/InstCombine/X86/x86-adds-subs.ll +++ /dev/null @@ -1,399 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt < %s -instcombine -S | FileCheck %s - -define <16 x i8> @sse2_adds_b_constant() { -; CHECK-LABEL: @sse2_adds_b_constant( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <16 x i8> @sse2_adds_b_constant_underflow() { -; CHECK-LABEL: @sse2_adds_b_constant_underflow( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <16 x i8> @sse2_adds_b_constant_overflow() { -; CHECK-LABEL: @sse2_adds_b_constant_overflow( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <16 x i8> @sse2_adds_b_constant_undefs() { -; CHECK-LABEL: @sse2_adds_b_constant_undefs( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <32 x i8> @avx2_adds_b_constant() { -; CHECK-LABEL: @avx2_adds_b_constant( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <32 x i8> @avx2_adds_b_constant_underflow() { -; CHECK-LABEL: @avx2_adds_b_constant_underflow( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <32 x i8> @avx2_adds_b_constant_overflow() { -; CHECK-LABEL: @avx2_adds_b_constant_overflow( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <32 x i8> @avx2_adds_b_constant_undefs() { -; CHECK-LABEL: @avx2_adds_b_constant_undefs( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <64 x i8> @avx512_mask_adds_b_constant() { -; CHECK-LABEL: @avx512_mask_adds_b_constant( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -3) - ret <64 x i8> %1 -} - -define <64 x i8> @avx512_mask_adds_b_constant_underflow() { -; CHECK-LABEL: @avx512_mask_adds_b_constant_underflow( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -1) - ret <64 x i8> %1 -} - -define <64 x i8> @avx512_mask_adds_b_constant_overflow() { -; CHECK-LABEL: @avx512_mask_adds_b_constant_overflow( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -1) - ret <64 x i8> %1 -} - -define <64 x i8> @avx512_mask_adds_b_constant_undefs() { -; CHECK-LABEL: @avx512_mask_adds_b_constant_undefs( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -1) - ret <64 x i8> %1 -} - -define <8 x i16> @sse2_adds_w_constant() { -; CHECK-LABEL: @sse2_adds_w_constant( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <8 x i16> @sse2_adds_w_constant_underflow() { -; CHECK-LABEL: @sse2_adds_w_constant_underflow( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <8 x i16> @sse2_adds_w_constant_overflow() { -; CHECK-LABEL: @sse2_adds_w_constant_overflow( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <8 x i16> @sse2_adds_w_constant_undefs() { -; CHECK-LABEL: @sse2_adds_w_constant_undefs( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <16 x i16> @avx2_adds_w_constant() { -; CHECK-LABEL: @avx2_adds_w_constant( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <16 x i16> @avx2_adds_w_constant_underflow() { -; CHECK-LABEL: @avx2_adds_w_constant_underflow( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <16 x i16> @avx2_adds_w_constant_overflow() { -; CHECK-LABEL: @avx2_adds_w_constant_overflow( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <16 x i16> @avx2_adds_w_constant_undefs() { -; CHECK-LABEL: @avx2_adds_w_constant_undefs( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <32 x i16> @avx512_mask_adds_w_constant() { -; CHECK-LABEL: @avx512_mask_adds_w_constant( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -3) - ret <32 x i16> %1 -} - -define <32 x i16> @avx512_mask_adds_w_constant_underflow() { -; CHECK-LABEL: @avx512_mask_adds_w_constant_underflow( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -1) - ret <32 x i16> %1 -} - -define <32 x i16> @avx512_mask_adds_w_constant_overflow() { -; CHECK-LABEL: @avx512_mask_adds_w_constant_overflow( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -1) - ret <32 x i16> %1 -} - -define <32 x i16> @avx512_mask_adds_w_constant_undefs() { -; CHECK-LABEL: @avx512_mask_adds_w_constant_undefs( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -1) - ret <32 x i16> %1 -} - -define <16 x i8> @sse2_subs_b_constant() { -; CHECK-LABEL: @sse2_subs_b_constant( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <16 x i8> @sse2_subs_b_constant_underflow() { -; CHECK-LABEL: @sse2_subs_b_constant_underflow( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <16 x i8> @sse2_subs_b_constant_overflow() { -; CHECK-LABEL: @sse2_subs_b_constant_overflow( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <16 x i8> @sse2_subs_b_constant_undefs() { -; CHECK-LABEL: @sse2_subs_b_constant_undefs( -; CHECK-NEXT: ret <16 x i8> -; - %1 = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> , <16 x i8> ) - ret <16 x i8> %1 -} - -define <32 x i8> @avx2_subs_b_constant() { -; CHECK-LABEL: @avx2_subs_b_constant( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <32 x i8> @avx2_subs_b_constant_underflow() { -; CHECK-LABEL: @avx2_subs_b_constant_underflow( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <32 x i8> @avx2_subs_b_constant_overflow() { -; CHECK-LABEL: @avx2_subs_b_constant_overflow( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <32 x i8> @avx2_subs_b_constant_undefs() { -; CHECK-LABEL: @avx2_subs_b_constant_undefs( -; CHECK-NEXT: ret <32 x i8> -; - %1 = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> , <32 x i8> ) - ret <32 x i8> %1 -} - -define <64 x i8> @avx512_mask_subs_b_constant() { -; CHECK-LABEL: @avx512_mask_subs_b_constant( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -3) - ret <64 x i8> %1 -} - -define <64 x i8> @avx512_mask_subs_b_constant_underflow() { -; CHECK-LABEL: @avx512_mask_subs_b_constant_underflow( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -1) - ret <64 x i8> %1 -} - -define <64 x i8> @avx512_mask_subs_b_constant_overflow() { -; CHECK-LABEL: @avx512_mask_subs_b_constant_overflow( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -1) - ret <64 x i8> %1 -} - -define <64 x i8> @avx512_mask_subs_b_constant_undefs() { -; CHECK-LABEL: @avx512_mask_subs_b_constant_undefs( -; CHECK-NEXT: ret <64 x i8> -; - %1 = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> , <64 x i8> , <64 x i8> zeroinitializer, i64 -1) - ret <64 x i8> %1 -} - -define <8 x i16> @sse2_subs_w_constant() { -; CHECK-LABEL: @sse2_subs_w_constant( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <8 x i16> @sse2_subs_w_constant_underflow() { -; CHECK-LABEL: @sse2_subs_w_constant_underflow( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <8 x i16> @sse2_subs_w_constant_overflow() { -; CHECK-LABEL: @sse2_subs_w_constant_overflow( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <8 x i16> @sse2_subs_w_constant_undefs() { -; CHECK-LABEL: @sse2_subs_w_constant_undefs( -; CHECK-NEXT: ret <8 x i16> -; - %1 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> , <8 x i16> ) - ret <8 x i16> %1 -} - -define <16 x i16> @avx2_subs_w_constant() { -; CHECK-LABEL: @avx2_subs_w_constant( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <16 x i16> @avx2_subs_w_constant_underflow() { -; CHECK-LABEL: @avx2_subs_w_constant_underflow( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <16 x i16> @avx2_subs_w_constant_overflow() { -; CHECK-LABEL: @avx2_subs_w_constant_overflow( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <16 x i16> @avx2_subs_w_constant_undefs() { -; CHECK-LABEL: @avx2_subs_w_constant_undefs( -; CHECK-NEXT: ret <16 x i16> -; - %1 = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> , <16 x i16> ) - ret <16 x i16> %1 -} - -define <32 x i16> @avx512_mask_subs_w_constant() { -; CHECK-LABEL: @avx512_mask_subs_w_constant( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -3) - ret <32 x i16> %1 -} - -define <32 x i16> @avx512_mask_subs_w_constant_underflow() { -; CHECK-LABEL: @avx512_mask_subs_w_constant_underflow( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -1) - ret <32 x i16> %1 -} - -define <32 x i16> @avx512_mask_subs_w_constant_overflow() { -; CHECK-LABEL: @avx512_mask_subs_w_constant_overflow( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -1) - ret <32 x i16> %1 -} - -define <32 x i16> @avx512_mask_subs_w_constant_undefs() { -; CHECK-LABEL: @avx512_mask_subs_w_constant_undefs( -; CHECK-NEXT: ret <32 x i16> -; - %1 = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> , <32 x i16> , <32 x i16> zeroinitializer, i32 -1) - ret <32 x i16> %1 -} - -declare <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8>, <16 x i8>) nounwind readnone -declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone -declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone -declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone -declare <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8>, <32 x i8>) nounwind readnone -declare <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8>, <32 x i8>) nounwind readnone -declare <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16>, <16 x i16>) nounwind readnone -declare <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16>, <16 x i16>) nounwind readnone -declare <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64) nounwind readnone -declare <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64) nounwind readnone -declare <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32) nounwind readnone -declare <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32) nounwind readnone diff --git a/test/Transforms/InstCombine/saturating-add-sub-vector.ll b/test/Transforms/InstCombine/saturating-add-sub-vector.ll new file mode 100644 index 00000000000..e823cc85782 --- /dev/null +++ b/test/Transforms/InstCombine/saturating-add-sub-vector.ll @@ -0,0 +1,411 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s + +define <16 x i8> @sadd_sat_v16i8_constant() { +; CHECK-LABEL: @sadd_sat_v16i8_constant( +; CHECK-NEXT: ret <16 x i8> +; + %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <16 x i8> @sadd_sat_v16i8_constant_underflow() { +; CHECK-LABEL: @sadd_sat_v16i8_constant_underflow( +; CHECK-NEXT: ret <16 x i8> +; + %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <16 x i8> @sadd_sat_v16i8_constant_overflow() { +; CHECK-LABEL: @sadd_sat_v16i8_constant_overflow( +; CHECK-NEXT: ret <16 x i8> +; + %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <16 x i8> @sadd_sat_v16i8_constant_undefs() { +; CHECK-LABEL: @sadd_sat_v16i8_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) +; CHECK-NEXT: ret <16 x i8> [[TMP1]] +; + %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <32 x i8> @sadd_sat_v32i8_constant() { +; CHECK-LABEL: @sadd_sat_v32i8_constant( +; CHECK-NEXT: ret <32 x i8> +; + %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <32 x i8> @sadd_sat_v32i8_constant_underflow() { +; CHECK-LABEL: @sadd_sat_v32i8_constant_underflow( +; CHECK-NEXT: ret <32 x i8> +; + %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <32 x i8> @sadd_sat_v32i8_constant_overflow() { +; CHECK-LABEL: @sadd_sat_v32i8_constant_overflow( +; CHECK-NEXT: ret <32 x i8> +; + %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <32 x i8> @sadd_sat_v32i8_constant_undefs() { +; CHECK-LABEL: @sadd_sat_v32i8_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) +; CHECK-NEXT: ret <32 x i8> [[TMP1]] +; + %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <64 x i8> @sadd_sat_v64i8_constant() { +; CHECK-LABEL: @sadd_sat_v64i8_constant( +; CHECK-NEXT: ret <64 x i8> +; + %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <64 x i8> @sadd_sat_v64i8_constant_underflow() { +; CHECK-LABEL: @sadd_sat_v64i8_constant_underflow( +; CHECK-NEXT: ret <64 x i8> +; + %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <64 x i8> @sadd_sat_v64i8_constant_overflow() { +; CHECK-LABEL: @sadd_sat_v64i8_constant_overflow( +; CHECK-NEXT: ret <64 x i8> +; + %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <64 x i8> @sadd_sat_v64i8_constant_undefs() { +; CHECK-LABEL: @sadd_sat_v64i8_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) +; CHECK-NEXT: ret <64 x i8> [[TMP1]] +; + %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <8 x i16> @sadd_sat_v8i16_constant() { +; CHECK-LABEL: @sadd_sat_v8i16_constant( +; CHECK-NEXT: ret <8 x i16> +; + %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <8 x i16> @sadd_sat_v8i16_constant_underflow() { +; CHECK-LABEL: @sadd_sat_v8i16_constant_underflow( +; CHECK-NEXT: ret <8 x i16> +; + %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <8 x i16> @sadd_sat_v8i16_constant_overflow() { +; CHECK-LABEL: @sadd_sat_v8i16_constant_overflow( +; CHECK-NEXT: ret <8 x i16> +; + %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <8 x i16> @sadd_sat_v8i16_constant_undefs() { +; CHECK-LABEL: @sadd_sat_v8i16_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) +; CHECK-NEXT: ret <8 x i16> [[TMP1]] +; + %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <16 x i16> @sadd_sat_v16i16_constant() { +; CHECK-LABEL: @sadd_sat_v16i16_constant( +; CHECK-NEXT: ret <16 x i16> +; + %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <16 x i16> @sadd_sat_v16i16_constant_underflow() { +; CHECK-LABEL: @sadd_sat_v16i16_constant_underflow( +; CHECK-NEXT: ret <16 x i16> +; + %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <16 x i16> @sadd_sat_v16i16_constant_overflow() { +; CHECK-LABEL: @sadd_sat_v16i16_constant_overflow( +; CHECK-NEXT: ret <16 x i16> +; + %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <16 x i16> @sadd_sat_v16i16_constant_undefs() { +; CHECK-LABEL: @sadd_sat_v16i16_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) +; CHECK-NEXT: ret <16 x i16> [[TMP1]] +; + %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <32 x i16> @sadd_sat_v32i16_constant() { +; CHECK-LABEL: @sadd_sat_v32i16_constant( +; CHECK-NEXT: ret <32 x i16> +; + %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +define <32 x i16> @sadd_sat_v32i16_constant_underflow() { +; CHECK-LABEL: @sadd_sat_v32i16_constant_underflow( +; CHECK-NEXT: ret <32 x i16> +; + %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +define <32 x i16> @sadd_sat_v32i16_constant_overflow() { +; CHECK-LABEL: @sadd_sat_v32i16_constant_overflow( +; CHECK-NEXT: ret <32 x i16> +; + %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +define <32 x i16> @sadd_sat_v32i16_constant_undefs() { +; CHECK-LABEL: @sadd_sat_v32i16_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) +; CHECK-NEXT: ret <32 x i16> [[TMP1]] +; + %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +define <16 x i8> @ssub_sat_v16i8_constant() { +; CHECK-LABEL: @ssub_sat_v16i8_constant( +; CHECK-NEXT: ret <16 x i8> +; + %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <16 x i8> @ssub_sat_v16i8_constant_underflow() { +; CHECK-LABEL: @ssub_sat_v16i8_constant_underflow( +; CHECK-NEXT: ret <16 x i8> +; + %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <16 x i8> @ssub_sat_v16i8_constant_overflow() { +; CHECK-LABEL: @ssub_sat_v16i8_constant_overflow( +; CHECK-NEXT: ret <16 x i8> +; + %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <16 x i8> @ssub_sat_v16i8_constant_undefs() { +; CHECK-LABEL: @ssub_sat_v16i8_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) +; CHECK-NEXT: ret <16 x i8> [[TMP1]] +; + %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) + ret <16 x i8> %1 +} + +define <32 x i8> @ssub_sat_v32i8_constant() { +; CHECK-LABEL: @ssub_sat_v32i8_constant( +; CHECK-NEXT: ret <32 x i8> +; + %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <32 x i8> @ssub_sat_v32i8_constant_underflow() { +; CHECK-LABEL: @ssub_sat_v32i8_constant_underflow( +; CHECK-NEXT: ret <32 x i8> +; + %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <32 x i8> @ssub_sat_v32i8_constant_overflow() { +; CHECK-LABEL: @ssub_sat_v32i8_constant_overflow( +; CHECK-NEXT: ret <32 x i8> +; + %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <32 x i8> @ssub_sat_v32i8_constant_undefs() { +; CHECK-LABEL: @ssub_sat_v32i8_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) +; CHECK-NEXT: ret <32 x i8> [[TMP1]] +; + %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) + ret <32 x i8> %1 +} + +define <64 x i8> @ssub_sat_v64i8_constant() { +; CHECK-LABEL: @ssub_sat_v64i8_constant( +; CHECK-NEXT: ret <64 x i8> +; + %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <64 x i8> @ssub_sat_v64i8_constant_underflow() { +; CHECK-LABEL: @ssub_sat_v64i8_constant_underflow( +; CHECK-NEXT: ret <64 x i8> +; + %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <64 x i8> @ssub_sat_v64i8_constant_overflow() { +; CHECK-LABEL: @ssub_sat_v64i8_constant_overflow( +; CHECK-NEXT: ret <64 x i8> +; + %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <64 x i8> @ssub_sat_v64i8_constant_undefs() { +; CHECK-LABEL: @ssub_sat_v64i8_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) +; CHECK-NEXT: ret <64 x i8> [[TMP1]] +; + %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) + ret <64 x i8> %1 +} + +define <8 x i16> @ssub_sat_v8i16_constant() { +; CHECK-LABEL: @ssub_sat_v8i16_constant( +; CHECK-NEXT: ret <8 x i16> +; + %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <8 x i16> @ssub_sat_v8i16_constant_underflow() { +; CHECK-LABEL: @ssub_sat_v8i16_constant_underflow( +; CHECK-NEXT: ret <8 x i16> +; + %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <8 x i16> @ssub_sat_v8i16_constant_overflow() { +; CHECK-LABEL: @ssub_sat_v8i16_constant_overflow( +; CHECK-NEXT: ret <8 x i16> +; + %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <8 x i16> @ssub_sat_v8i16_constant_undefs() { +; CHECK-LABEL: @ssub_sat_v8i16_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) +; CHECK-NEXT: ret <8 x i16> [[TMP1]] +; + %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) + ret <8 x i16> %1 +} + +define <16 x i16> @ssub_sat_v16i16_constant() { +; CHECK-LABEL: @ssub_sat_v16i16_constant( +; CHECK-NEXT: ret <16 x i16> +; + %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <16 x i16> @ssub_sat_v16i16_constant_underflow() { +; CHECK-LABEL: @ssub_sat_v16i16_constant_underflow( +; CHECK-NEXT: ret <16 x i16> +; + %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <16 x i16> @ssub_sat_v16i16_constant_overflow() { +; CHECK-LABEL: @ssub_sat_v16i16_constant_overflow( +; CHECK-NEXT: ret <16 x i16> +; + %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <16 x i16> @ssub_sat_v16i16_constant_undefs() { +; CHECK-LABEL: @ssub_sat_v16i16_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) +; CHECK-NEXT: ret <16 x i16> [[TMP1]] +; + %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) + ret <16 x i16> %1 +} + +define <32 x i16> @ssub_sat_v32i16_constant() { +; CHECK-LABEL: @ssub_sat_v32i16_constant( +; CHECK-NEXT: ret <32 x i16> +; + %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +define <32 x i16> @ssub_sat_v32i16_constant_underflow() { +; CHECK-LABEL: @ssub_sat_v32i16_constant_underflow( +; CHECK-NEXT: ret <32 x i16> +; + %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +define <32 x i16> @ssub_sat_v32i16_constant_overflow() { +; CHECK-LABEL: @ssub_sat_v32i16_constant_overflow( +; CHECK-NEXT: ret <32 x i16> +; + %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +define <32 x i16> @ssub_sat_v32i16_constant_undefs() { +; CHECK-LABEL: @ssub_sat_v32i16_constant_undefs( +; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) +; CHECK-NEXT: ret <32 x i16> [[TMP1]] +; + %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) + ret <32 x i16> %1 +} + +declare <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8>, <16 x i8>) nounwind readnone +declare <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8>, <16 x i8>) nounwind readnone +declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>) nounwind readnone +declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>) nounwind readnone +declare <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8>, <32 x i8>) nounwind readnone +declare <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8>, <32 x i8>) nounwind readnone +declare <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16>, <16 x i16>) nounwind readnone +declare <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16>, <16 x i16>) nounwind readnone +declare <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8>, <64 x i8>) nounwind readnone +declare <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8>, <64 x i8>) nounwind readnone +declare <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16>, <32 x i16>) nounwind readnone +declare <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16>, <32 x i16>) nounwind readnone