From: Roman Lebedev <lebedev.ri@gmail.com>
Date: Tue, 1 Oct 2019 17:50:09 +0000 (+0000)
Subject: [InstCombine] Preserve 'exact' in -(X >>u 31) -> (X >>s 31) fold
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=d9952bbfc71842047204daf903ca3f590b7e11c3;p=llvm

[InstCombine] Preserve 'exact' in -(X >>u 31) -> (X >>s 31) fold

https://rise4fun.com/Alive/yR4

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373363 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 9d640e849dc..7e3d405e906 100644
--- a/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1676,12 +1676,16 @@ Instruction *InstCombiner::visitSub(BinaryOperator &I) {
       if (match(Op1, m_LShr(m_Value(X), m_APInt(ShAmt))) &&
           *ShAmt == BitWidth - 1) {
         Value *ShAmtOp = cast<Instruction>(Op1)->getOperand(1);
-        return BinaryOperator::CreateAShr(X, ShAmtOp);
+        Instruction *NewShift = BinaryOperator::CreateAShr(X, ShAmtOp);
+        NewShift->copyIRFlags(Op1);
+        return NewShift;
       }
       if (match(Op1, m_AShr(m_Value(X), m_APInt(ShAmt))) &&
           *ShAmt == BitWidth - 1) {
         Value *ShAmtOp = cast<Instruction>(Op1)->getOperand(1);
-        return BinaryOperator::CreateLShr(X, ShAmtOp);
+        Instruction *NewShift = BinaryOperator::CreateLShr(X, ShAmtOp);
+        NewShift->copyIRFlags(Op1);
+        return NewShift;
       }
 
       if (Op1->hasOneUse()) {
diff --git a/test/Transforms/InstCombine/high-bit-signmask.ll b/test/Transforms/InstCombine/high-bit-signmask.ll
index 7c771f43dd4..4a1b395ca35 100644
--- a/test/Transforms/InstCombine/high-bit-signmask.ll
+++ b/test/Transforms/InstCombine/high-bit-signmask.ll
@@ -12,7 +12,7 @@ define i64 @t0(i64 %x) {
 }
 define i64 @t0_exact(i64 %x) {
 ; CHECK-LABEL: @t0_exact(
-; CHECK-NEXT:    [[R:%.*]] = ashr i64 [[X:%.*]], 63
+; CHECK-NEXT:    [[R:%.*]] = ashr exact i64 [[X:%.*]], 63
 ; CHECK-NEXT:    ret i64 [[R]]
 ;
   %t0 = lshr exact i64 %x, 63
@@ -30,7 +30,7 @@ define i64 @t2(i64 %x) {
 }
 define i64 @t3_exact(i64 %x) {
 ; CHECK-LABEL: @t3_exact(
-; CHECK-NEXT:    [[R:%.*]] = lshr i64 [[X:%.*]], 63
+; CHECK-NEXT:    [[R:%.*]] = lshr exact i64 [[X:%.*]], 63
 ; CHECK-NEXT:    ret i64 [[R]]
 ;
   %t0 = ashr exact i64 %x, 63