From: Sanjay Patel Date: Mon, 6 Feb 2017 17:16:16 +0000 (+0000) Subject: [InstCombine] simplify dyn_cast + isa; NFCI X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=d9394e7ae7841a85a654dfb9bda8ebf8b0994d38;p=llvm [InstCombine] simplify dyn_cast + isa; NFCI git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294198 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Transforms/InstCombine/InstructionCombining.cpp b/lib/Transforms/InstCombine/InstructionCombining.cpp index b74b3273acd..ba65ea6f510 100644 --- a/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -568,13 +568,11 @@ static Value *tryFactorization(InstCombiner::BuilderTy *Builder, if (isa(&I)) HasNSW = I.hasNoSignedWrap(); - if (BinaryOperator *Op0 = dyn_cast(LHS)) - if (isa(Op0)) - HasNSW &= Op0->hasNoSignedWrap(); + if (auto *LOBO = dyn_cast(LHS)) + HasNSW &= LOBO->hasNoSignedWrap(); - if (BinaryOperator *Op1 = dyn_cast(RHS)) - if (isa(Op1)) - HasNSW &= Op1->hasNoSignedWrap(); + if (auto *ROBO = dyn_cast(RHS)) + HasNSW &= ROBO->hasNoSignedWrap(); // We can propagate 'nsw' if we know that // %Y = mul nsw i16 %X, C