From: Sanjay Patel Date: Sun, 30 Oct 2016 18:19:35 +0000 (+0000) Subject: [DAG] x | x --> x X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=d43c4b8bfc79cf10476c2611b252ba8f3c9ae614;p=llvm [DAG] x | x --> x git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285522 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index e78a3562a05..e1da385c7bd 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3815,6 +3815,10 @@ SDValue DAGCombiner::visitOR(SDNode *N) { SDValue N1 = N->getOperand(1); EVT VT = N1.getValueType(); + // x | x --> x + if (N0 == N1) + return N0; + // fold vector ops if (VT.isVector()) { if (SDValue FoldedVOp = SimplifyVBinOp(N)) diff --git a/test/CodeGen/X86/combine-or.ll b/test/CodeGen/X86/combine-or.ll index bc439de9cf0..60825d2bc72 100644 --- a/test/CodeGen/X86/combine-or.ll +++ b/test/CodeGen/X86/combine-or.ll @@ -4,7 +4,6 @@ define i32 @or_self(i32 %x) { ; CHECK-LABEL: or_self: ; CHECK: # BB#0: -; CHECK-NEXT: orl %edi, %edi ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: retq %or = or i32 %x, %x @@ -14,7 +13,6 @@ define i32 @or_self(i32 %x) { define <4 x i32> @or_self_vec(<4 x i32> %x) { ; CHECK-LABEL: or_self_vec: ; CHECK: # BB#0: -; CHECK-NEXT: orps %xmm0, %xmm0 ; CHECK-NEXT: retq %or = or <4 x i32> %x, %x ret <4 x i32> %or