From: Ivan Grokhotkov <ivan@espressif.com>
Date: Tue, 21 Feb 2017 09:00:43 +0000 (+0800)
Subject: deep sleep: bring some registers into known state
X-Git-Tag: v2.0-rc2~41^2~1
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=d3fde5188e3df788764edf7317b10034a7c724d1;p=esp-idf

deep sleep: bring some registers into known state

In case WiFi/BT stack has been enabled but wasn’t disabled, some RTC
bits may be left enabled, causing increased current consumption.
This change returns some of the bits back to their default values.
---

diff --git a/components/esp32/deep_sleep.c b/components/esp32/deep_sleep.c
index 3eef7ca29d..4d672402e1 100644
--- a/components/esp32/deep_sleep.c
+++ b/components/esp32/deep_sleep.c
@@ -22,6 +22,7 @@
 #include "rom/uart.h"
 #include "soc/cpu.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/sens_reg.h"
 #include "soc/dport_reg.h"
 #include "driver/rtc_io.h"
 #include "freertos/FreeRTOS.h"
@@ -111,6 +112,13 @@ void IRAM_ATTR esp_deep_sleep_start()
     // Decide which power domains can be powered down
     uint32_t pd_flags = get_power_down_flags();
 
+    // Shut down parts of RTC which may have been left enabled by the wireless drivers
+    CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG,
+            RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU |
+            RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
+
+    SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR_M, 0, SENS_FORCE_XPD_SAR_S);
+
     // Configure pins for external wakeup
     if (s_config.wakeup_triggers & EXT_EVENT0_TRIG_EN) {
         ext0_wakeup_prepare();