From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Tue, 17 Jan 2017 22:12:25 +0000 (+0000)
Subject: [X86][SSE] Split UMIN and UMAX known bits tests
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=d3e09ec89916ff3df33be6adb1d37740161d596a;p=llvm

[X86][SSE] Split UMIN and UMAX known bits tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292277 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/known-bits-vector.ll b/test/CodeGen/X86/known-bits-vector.ll
index 8e720063dd6..384030b3668 100644
--- a/test/CodeGen/X86/known-bits-vector.ll
+++ b/test/CodeGen/X86/known-bits-vector.ll
@@ -476,10 +476,9 @@ define <4 x float> @knownbits_smax_smin_shuffle_uitofp(<4 x i32> %a0) {
 declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
 declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone
 
-define <4 x float> @knownbits_umax_umin_shuffle_uitofp(<4 x i32> %a0) {
-; X32-LABEL: knownbits_umax_umin_shuffle_uitofp:
+define <4 x float> @knownbits_umin_shuffle_uitofp(<4 x i32> %a0) {
+; X32-LABEL: knownbits_umin_shuffle_uitofp:
 ; X32:       # BB#0:
-; X32-NEXT:    vpmaxud {{\.LCPI.*}}, %xmm0, %xmm0
 ; X32-NEXT:    vpminud {{\.LCPI.*}}, %xmm0, %xmm0
 ; X32-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
 ; X32-NEXT:    vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
@@ -489,9 +488,8 @@ define <4 x float> @knownbits_umax_umin_shuffle_uitofp(<4 x i32> %a0) {
 ; X32-NEXT:    vaddps %xmm0, %xmm1, %xmm0
 ; X32-NEXT:    retl
 ;
-; X64-LABEL: knownbits_umax_umin_shuffle_uitofp:
+; X64-LABEL: knownbits_umin_shuffle_uitofp:
 ; X64:       # BB#0:
-; X64-NEXT:    vpmaxud {{.*}}(%rip), %xmm0, %xmm0
 ; X64-NEXT:    vpminud {{.*}}(%rip), %xmm0, %xmm0
 ; X64-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
 ; X64-NEXT:    vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
@@ -500,15 +498,34 @@ define <4 x float> @knownbits_umax_umin_shuffle_uitofp(<4 x i32> %a0) {
 ; X64-NEXT:    vaddps {{.*}}(%rip), %xmm0, %xmm0
 ; X64-NEXT:    vaddps %xmm0, %xmm1, %xmm0
 ; X64-NEXT:    retq
-  %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 255, i32 -1, i32 -1, i32 1023>)
-  %2 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %1, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
-  %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
-  %4 = uitofp <4 x i32> %3 to <4 x float>
-  ret <4 x float> %4
+  %1 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
+  %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
+  %3 = uitofp <4 x i32> %2 to <4 x float>
+  ret <4 x float> %3
 }
 declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
 declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone
 
+define <4 x i32> @knownbits_umax_shuffle_ashr(<4 x i32> %a0) {
+; X32-LABEL: knownbits_umax_shuffle_ashr:
+; X32:       # BB#0:
+; X32-NEXT:    vpmaxud {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
+; X32-NEXT:    vpsrad $31, %xmm0, %xmm0
+; X32-NEXT:    retl
+;
+; X64-LABEL: knownbits_umax_shuffle_ashr:
+; X64:       # BB#0:
+; X64-NEXT:    vpmaxud {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
+; X64-NEXT:    vpsrad $31, %xmm0, %xmm0
+; X64-NEXT:    retq
+  %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -15, i32 262143>)
+  %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
+  %3 = ashr <4 x i32> %2, <i32 31, i32 31, i32 31, i32 31>
+  ret <4 x i32> %3
+}
+
 define <4 x float> @knownbits_mask_umax_shuffle_uitofp(<4 x i32> %a0) {
 ; X32-LABEL: knownbits_mask_umax_shuffle_uitofp:
 ; X32:       # BB#0: