From: Sanjay Patel Date: Fri, 2 Jun 2017 23:40:46 +0000 (+0000) Subject: [x86] fix over-specific triple; NFC X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=d3d2aec57b4ca21e5c6fdb20dcc42543093e0c5d;p=llvm [x86] fix over-specific triple; NFC There's nothing darwin-specific in these tests, and using that setting causes extra phantom diffs when the auto-generated check lines are regenerated today. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304614 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/avx512-cvt.ll b/test/CodeGen/X86/avx512-cvt.ll index 33ac15de9de..8f6afa8785d 100644 --- a/test/CodeGen/X86/avx512-cvt.ll +++ b/test/CodeGen/X86/avx512-cvt.ll @@ -1,16 +1,16 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=NOVL --check-prefix=NODQ --check-prefix=NOVLDQ --check-prefix=KNL -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=DQ --check-prefix=VL --check-prefix=VLDQ --check-prefix=VLBW --check-prefix=SKX -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NODQ --check-prefix=VL --check-prefix=VLNODQ --check-prefix=VLNOBW --check-prefix=AVX512VL -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NOVL --check-prefix=DQ --check-prefix=AVX512DQ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NOVL --check-prefix=NODQ --check-prefix=NOVLDQ --check-prefix=AVX512BW -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512vl,avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=DQ --check-prefix=VL --check-prefix=VLDQ --check-prefix=VLNOBW --check-prefix=AVX512VLDQ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512vl,avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NODQ --check-prefix=VL --check-prefix=VLNODQ --check-prefix=VLBW --check-prefix=AVX512VLBW +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=NOVL --check-prefix=NODQ --check-prefix=NOVLDQ --check-prefix=KNL +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=DQ --check-prefix=VL --check-prefix=VLDQ --check-prefix=VLBW --check-prefix=SKX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NODQ --check-prefix=VL --check-prefix=VLNODQ --check-prefix=VLNOBW --check-prefix=AVX512VL +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NOVL --check-prefix=DQ --check-prefix=AVX512DQ +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NOVL --check-prefix=NODQ --check-prefix=NOVLDQ --check-prefix=AVX512BW +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=DQ --check-prefix=VL --check-prefix=VLDQ --check-prefix=VLNOBW --check-prefix=AVX512VLDQ +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=NODQ --check-prefix=VL --check-prefix=VLNODQ --check-prefix=VLBW --check-prefix=AVX512VLBW define <16 x float> @sitof32(<16 x i32> %a) nounwind { ; ALL-LABEL: sitof32: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtdq2ps %zmm0, %zmm0 ; ALL-NEXT: retq %b = sitofp <16 x i32> %a to <16 x float> @@ -19,7 +19,7 @@ define <16 x float> @sitof32(<16 x i32> %a) nounwind { define <8 x double> @sltof864(<8 x i64> %a) { ; NODQ-LABEL: sltof864: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vextracti32x4 $3, %zmm0, %xmm1 ; NODQ-NEXT: vpextrq $1, %xmm1, %rax ; NODQ-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 @@ -49,7 +49,7 @@ define <8 x double> @sltof864(<8 x i64> %a) { ; NODQ-NEXT: retq ; ; DQ-LABEL: sltof864: -; DQ: ## BB#0: +; DQ: # BB#0: ; DQ-NEXT: vcvtqq2pd %zmm0, %zmm0 ; DQ-NEXT: retq %b = sitofp <8 x i64> %a to <8 x double> @@ -58,7 +58,7 @@ define <8 x double> @sltof864(<8 x i64> %a) { define <4 x double> @sltof464(<4 x i64> %a) { ; NODQ-LABEL: sltof464: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vextracti128 $1, %ymm0, %xmm1 ; NODQ-NEXT: vpextrq $1, %xmm1, %rax ; NODQ-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 @@ -74,15 +74,15 @@ define <4 x double> @sltof464(<4 x i64> %a) { ; NODQ-NEXT: retq ; ; VLDQ-LABEL: sltof464: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vcvtqq2pd %ymm0, %ymm0 ; VLDQ-NEXT: retq ; ; AVX512DQ-LABEL: sltof464: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0 -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: retq %b = sitofp <4 x i64> %a to <4 x double> ret <4 x double> %b @@ -90,7 +90,7 @@ define <4 x double> @sltof464(<4 x i64> %a) { define <2 x float> @sltof2f32(<2 x i64> %a) { ; NODQ-LABEL: sltof2f32: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vpextrq $1, %xmm0, %rax ; NODQ-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 ; NODQ-NEXT: vmovq %xmm0, %rax @@ -101,15 +101,15 @@ define <2 x float> @sltof2f32(<2 x i64> %a) { ; NODQ-NEXT: retq ; ; VLDQ-LABEL: sltof2f32: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vcvtqq2ps %xmm0, %xmm0 ; VLDQ-NEXT: retq ; ; AVX512DQ-LABEL: sltof2f32: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: retq %b = sitofp <2 x i64> %a to <2 x float> @@ -118,7 +118,7 @@ define <2 x float> @sltof2f32(<2 x i64> %a) { define <4 x float> @sltof4f32_mem(<4 x i64>* %a) { ; KNL-LABEL: sltof4f32_mem: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: vmovdqu (%rdi), %ymm0 ; KNL-NEXT: vpextrq $1, %xmm0, %rax ; KNL-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 @@ -135,12 +135,12 @@ define <4 x float> @sltof4f32_mem(<4 x i64>* %a) { ; KNL-NEXT: retq ; ; VLDQ-LABEL: sltof4f32_mem: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vcvtqq2psy (%rdi), %xmm0 ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sltof4f32_mem: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vmovdqu (%rdi), %ymm0 ; VLNODQ-NEXT: vpextrq $1, %xmm0, %rax ; VLNODQ-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 @@ -158,15 +158,15 @@ define <4 x float> @sltof4f32_mem(<4 x i64>* %a) { ; VLNODQ-NEXT: retq ; ; AVX512DQ-LABEL: sltof4f32_mem: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: vmovups (%rdi), %ymm0 ; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: sltof4f32_mem: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vmovdqu (%rdi), %ymm0 ; AVX512BW-NEXT: vpextrq $1, %xmm0, %rax ; AVX512BW-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 @@ -189,7 +189,7 @@ define <4 x float> @sltof4f32_mem(<4 x i64>* %a) { define <4 x i64> @f64tosl(<4 x double> %a) { ; NODQ-LABEL: f64tosl: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vextractf128 $1, %ymm0, %xmm1 ; NODQ-NEXT: vcvttsd2si %xmm1, %rax ; NODQ-NEXT: vmovq %rax, %xmm2 @@ -207,15 +207,15 @@ define <4 x i64> @f64tosl(<4 x double> %a) { ; NODQ-NEXT: retq ; ; VLDQ-LABEL: f64tosl: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vcvttpd2qq %ymm0, %ymm0 ; VLDQ-NEXT: retq ; ; AVX512DQ-LABEL: f64tosl: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: vcvttpd2qq %zmm0, %zmm0 -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: retq %b = fptosi <4 x double> %a to <4 x i64> ret <4 x i64> %b @@ -223,7 +223,7 @@ define <4 x i64> @f64tosl(<4 x double> %a) { define <4 x i64> @f32tosl(<4 x float> %a) { ; NODQ-LABEL: f32tosl: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3] ; NODQ-NEXT: vcvttss2si %xmm1, %rax ; NODQ-NEXT: vmovq %rax, %xmm1 @@ -241,15 +241,15 @@ define <4 x i64> @f32tosl(<4 x float> %a) { ; NODQ-NEXT: retq ; ; VLDQ-LABEL: f32tosl: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vcvttps2qq %xmm0, %ymm0 ; VLDQ-NEXT: retq ; ; AVX512DQ-LABEL: f32tosl: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm0 -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: retq %b = fptosi <4 x float> %a to <4 x i64> ret <4 x i64> %b @@ -257,7 +257,7 @@ define <4 x i64> @f32tosl(<4 x float> %a) { define <4 x float> @sltof432(<4 x i64> %a) { ; KNL-LABEL: sltof432: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: vpextrq $1, %xmm0, %rax ; KNL-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 ; KNL-NEXT: vmovq %xmm0, %rax @@ -273,13 +273,13 @@ define <4 x float> @sltof432(<4 x i64> %a) { ; KNL-NEXT: retq ; ; VLDQ-LABEL: sltof432: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vcvtqq2ps %ymm0, %xmm0 ; VLDQ-NEXT: vzeroupper ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sltof432: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpextrq $1, %xmm0, %rax ; VLNODQ-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 ; VLNODQ-NEXT: vmovq %xmm0, %rax @@ -296,15 +296,15 @@ define <4 x float> @sltof432(<4 x i64> %a) { ; VLNODQ-NEXT: retq ; ; AVX512DQ-LABEL: sltof432: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: sltof432: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpextrq $1, %xmm0, %rax ; AVX512BW-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 ; AVX512BW-NEXT: vmovq %xmm0, %rax @@ -325,7 +325,7 @@ define <4 x float> @sltof432(<4 x i64> %a) { define <4 x float> @ultof432(<4 x i64> %a) { ; KNL-LABEL: ultof432: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: vpextrq $1, %xmm0, %rax ; KNL-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 ; KNL-NEXT: vmovq %xmm0, %rax @@ -341,13 +341,13 @@ define <4 x float> @ultof432(<4 x i64> %a) { ; KNL-NEXT: retq ; ; VLDQ-LABEL: ultof432: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vcvtuqq2ps %ymm0, %xmm0 ; VLDQ-NEXT: vzeroupper ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: ultof432: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpextrq $1, %xmm0, %rax ; VLNODQ-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 ; VLNODQ-NEXT: vmovq %xmm0, %rax @@ -364,15 +364,15 @@ define <4 x float> @ultof432(<4 x i64> %a) { ; VLNODQ-NEXT: retq ; ; AVX512DQ-LABEL: ultof432: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: ultof432: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpextrq $1, %xmm0, %rax ; AVX512BW-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 ; AVX512BW-NEXT: vmovq %xmm0, %rax @@ -393,7 +393,7 @@ define <4 x float> @ultof432(<4 x i64> %a) { define <8 x double> @ultof64(<8 x i64> %a) { ; NODQ-LABEL: ultof64: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vextracti32x4 $3, %zmm0, %xmm1 ; NODQ-NEXT: vpextrq $1, %xmm1, %rax ; NODQ-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm2 @@ -423,7 +423,7 @@ define <8 x double> @ultof64(<8 x i64> %a) { ; NODQ-NEXT: retq ; ; DQ-LABEL: ultof64: -; DQ: ## BB#0: +; DQ: # BB#0: ; DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0 ; DQ-NEXT: retq %b = uitofp <8 x i64> %a to <8 x double> @@ -432,7 +432,7 @@ define <8 x double> @ultof64(<8 x i64> %a) { define <16 x i32> @fptosi00(<16 x float> %a) nounwind { ; ALL-LABEL: fptosi00: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvttps2dq %zmm0, %zmm0 ; ALL-NEXT: retq %b = fptosi <16 x float> %a to <16 x i32> @@ -441,7 +441,7 @@ define <16 x i32> @fptosi00(<16 x float> %a) nounwind { define <16 x i32> @fptoui00(<16 x float> %a) nounwind { ; ALL-LABEL: fptoui00: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvttps2udq %zmm0, %zmm0 ; ALL-NEXT: retq %b = fptoui <16 x float> %a to <16 x i32> @@ -450,14 +450,14 @@ define <16 x i32> @fptoui00(<16 x float> %a) nounwind { define <8 x i32> @fptoui_256(<8 x float> %a) nounwind { ; NOVL-LABEL: fptoui_256: -; NOVL: ## BB#0: -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL: # BB#0: +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: vcvttps2udq %zmm0, %zmm0 -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: retq ; ; VL-LABEL: fptoui_256: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vcvttps2udq %ymm0, %ymm0 ; VL-NEXT: retq %b = fptoui <8 x float> %a to <8 x i32> @@ -466,30 +466,30 @@ define <8 x i32> @fptoui_256(<8 x float> %a) nounwind { define <4 x i32> @fptoui_128(<4 x float> %a) nounwind { ; KNL-LABEL: fptoui_128: -; KNL: ## BB#0: -; KNL-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; KNL: # BB#0: +; KNL-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; KNL-NEXT: vcvttps2udq %zmm0, %zmm0 -; KNL-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; KNL-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; KNL-NEXT: retq ; ; VL-LABEL: fptoui_128: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vcvttps2udq %xmm0, %xmm0 ; VL-NEXT: retq ; ; AVX512DQ-LABEL: fptoui_128: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512DQ-NEXT: vcvttps2udq %zmm0, %zmm0 -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: fptoui_128: -; AVX512BW: ## BB#0: -; AVX512BW-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512BW: # BB#0: +; AVX512BW-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512BW-NEXT: vcvttps2udq %zmm0, %zmm0 -; AVX512BW-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512BW-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq %b = fptoui <4 x float> %a to <4 x i32> @@ -498,7 +498,7 @@ define <4 x i32> @fptoui_128(<4 x float> %a) nounwind { define <8 x i32> @fptoui01(<8 x double> %a) nounwind { ; ALL-LABEL: fptoui01: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvttpd2udq %zmm0, %ymm0 ; ALL-NEXT: retq %b = fptoui <8 x double> %a to <8 x i32> @@ -507,31 +507,31 @@ define <8 x i32> @fptoui01(<8 x double> %a) nounwind { define <4 x i32> @fptoui_256d(<4 x double> %a) nounwind { ; KNL-LABEL: fptoui_256d: -; KNL: ## BB#0: -; KNL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; KNL: # BB#0: +; KNL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; KNL-NEXT: vcvttpd2udq %zmm0, %ymm0 -; KNL-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; KNL-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; KNL-NEXT: retq ; ; VL-LABEL: fptoui_256d: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vcvttpd2udq %ymm0, %xmm0 ; VL-NEXT: vzeroupper ; VL-NEXT: retq ; ; AVX512DQ-LABEL: fptoui_256d: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: vcvttpd2udq %zmm0, %ymm0 -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: fptoui_256d: -; AVX512BW: ## BB#0: -; AVX512BW-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512BW: # BB#0: +; AVX512BW-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512BW-NEXT: vcvttpd2udq %zmm0, %ymm0 -; AVX512BW-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; AVX512BW-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq %b = fptoui <4 x double> %a to <4 x i32> @@ -540,7 +540,7 @@ define <4 x i32> @fptoui_256d(<4 x double> %a) nounwind { define <8 x double> @sitof64(<8 x i32> %a) { ; ALL-LABEL: sitof64: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtdq2pd %ymm0, %zmm0 ; ALL-NEXT: retq %b = sitofp <8 x i32> %a to <8 x double> @@ -548,31 +548,31 @@ define <8 x double> @sitof64(<8 x i32> %a) { } define <8 x double> @sitof64_mask(<8 x double> %a, <8 x i32> %b, i8 %c) nounwind { ; KNL-LABEL: sitof64_mask: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: kmovw %edi, %k1 ; KNL-NEXT: vcvtdq2pd %ymm1, %zmm0 {%k1} ; KNL-NEXT: retq ; ; VLBW-LABEL: sitof64_mask: -; VLBW: ## BB#0: +; VLBW: # BB#0: ; VLBW-NEXT: kmovd %edi, %k1 ; VLBW-NEXT: vcvtdq2pd %ymm1, %zmm0 {%k1} ; VLBW-NEXT: retq ; ; VLNOBW-LABEL: sitof64_mask: -; VLNOBW: ## BB#0: +; VLNOBW: # BB#0: ; VLNOBW-NEXT: kmovw %edi, %k1 ; VLNOBW-NEXT: vcvtdq2pd %ymm1, %zmm0 {%k1} ; VLNOBW-NEXT: retq ; ; AVX512DQ-LABEL: sitof64_mask: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: kmovw %edi, %k1 ; AVX512DQ-NEXT: vcvtdq2pd %ymm1, %zmm0 {%k1} ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: sitof64_mask: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: kmovd %edi, %k1 ; AVX512BW-NEXT: vcvtdq2pd %ymm1, %zmm0 {%k1} ; AVX512BW-NEXT: retq @@ -583,31 +583,31 @@ define <8 x double> @sitof64_mask(<8 x double> %a, <8 x i32> %b, i8 %c) nounwind } define <8 x double> @sitof64_maskz(<8 x i32> %a, i8 %b) nounwind { ; KNL-LABEL: sitof64_maskz: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: kmovw %edi, %k1 ; KNL-NEXT: vcvtdq2pd %ymm0, %zmm0 {%k1} {z} ; KNL-NEXT: retq ; ; VLBW-LABEL: sitof64_maskz: -; VLBW: ## BB#0: +; VLBW: # BB#0: ; VLBW-NEXT: kmovd %edi, %k1 ; VLBW-NEXT: vcvtdq2pd %ymm0, %zmm0 {%k1} {z} ; VLBW-NEXT: retq ; ; VLNOBW-LABEL: sitof64_maskz: -; VLNOBW: ## BB#0: +; VLNOBW: # BB#0: ; VLNOBW-NEXT: kmovw %edi, %k1 ; VLNOBW-NEXT: vcvtdq2pd %ymm0, %zmm0 {%k1} {z} ; VLNOBW-NEXT: retq ; ; AVX512DQ-LABEL: sitof64_maskz: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: kmovw %edi, %k1 ; AVX512DQ-NEXT: vcvtdq2pd %ymm0, %zmm0 {%k1} {z} ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: sitof64_maskz: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: kmovd %edi, %k1 ; AVX512BW-NEXT: vcvtdq2pd %ymm0, %zmm0 {%k1} {z} ; AVX512BW-NEXT: retq @@ -619,7 +619,7 @@ define <8 x double> @sitof64_maskz(<8 x i32> %a, i8 %b) nounwind { define <8 x i32> @fptosi01(<8 x double> %a) { ; ALL-LABEL: fptosi01: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvttpd2dq %zmm0, %ymm0 ; ALL-NEXT: retq %b = fptosi <8 x double> %a to <8 x i32> @@ -628,12 +628,12 @@ define <8 x i32> @fptosi01(<8 x double> %a) { define <4 x i32> @fptosi03(<4 x double> %a) { ; KNL-LABEL: fptosi03: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: vcvttpd2dq %ymm0, %xmm0 ; KNL-NEXT: retq ; ; AVX512-LABEL: fptosi03: -; AVX512: ## BB#0: +; AVX512: # BB#0: ; AVX512-NEXT: vcvttpd2dq %ymm0, %xmm0 ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq @@ -643,14 +643,14 @@ define <4 x i32> @fptosi03(<4 x double> %a) { define <16 x float> @fptrunc00(<16 x double> %b) nounwind { ; NODQ-LABEL: fptrunc00: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vcvtpd2ps %zmm0, %ymm0 ; NODQ-NEXT: vcvtpd2ps %zmm1, %ymm1 ; NODQ-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ; NODQ-NEXT: retq ; ; DQ-LABEL: fptrunc00: -; DQ: ## BB#0: +; DQ: # BB#0: ; DQ-NEXT: vcvtpd2ps %zmm0, %ymm0 ; DQ-NEXT: vcvtpd2ps %zmm1, %ymm1 ; DQ-NEXT: vinsertf32x8 $1, %ymm1, %zmm0, %zmm0 @@ -661,12 +661,12 @@ define <16 x float> @fptrunc00(<16 x double> %b) nounwind { define <4 x float> @fptrunc01(<4 x double> %b) { ; KNL-LABEL: fptrunc01: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: vcvtpd2ps %ymm0, %xmm0 ; KNL-NEXT: retq ; ; AVX512-LABEL: fptrunc01: -; AVX512: ## BB#0: +; AVX512: # BB#0: ; AVX512-NEXT: vcvtpd2ps %ymm0, %xmm0 ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq @@ -676,7 +676,7 @@ define <4 x float> @fptrunc01(<4 x double> %b) { define <4 x float> @fptrunc02(<4 x double> %b, <4 x i1> %mask) { ; KNL-LABEL: fptrunc02: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: vpslld $31, %xmm1, %xmm1 ; KNL-NEXT: vpsrad $31, %xmm1, %xmm1 ; KNL-NEXT: vcvtpd2ps %ymm0, %xmm0 @@ -684,7 +684,7 @@ define <4 x float> @fptrunc02(<4 x double> %b, <4 x i1> %mask) { ; KNL-NEXT: retq ; ; VL-LABEL: fptrunc02: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vpslld $31, %xmm1, %xmm1 ; VL-NEXT: vptestmd %xmm1, %xmm1, %k1 ; VL-NEXT: vcvtpd2ps %ymm0, %xmm0 {%k1} {z} @@ -692,7 +692,7 @@ define <4 x float> @fptrunc02(<4 x double> %b, <4 x i1> %mask) { ; VL-NEXT: retq ; ; AVX512DQ-LABEL: fptrunc02: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: vpslld $31, %xmm1, %xmm1 ; AVX512DQ-NEXT: vpsrad $31, %xmm1, %xmm1 ; AVX512DQ-NEXT: vcvtpd2ps %ymm0, %xmm0 @@ -701,7 +701,7 @@ define <4 x float> @fptrunc02(<4 x double> %b, <4 x i1> %mask) { ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: fptrunc02: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpslld $31, %xmm1, %xmm1 ; AVX512BW-NEXT: vpsrad $31, %xmm1, %xmm1 ; AVX512BW-NEXT: vcvtpd2ps %ymm0, %xmm0 @@ -715,7 +715,7 @@ define <4 x float> @fptrunc02(<4 x double> %b, <4 x i1> %mask) { define <4 x float> @fptrunc03(<2 x double> %a0, <4 x float> %a1) nounwind { ; ALL-LABEL: fptrunc03: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtsd2ss %xmm0, %xmm1, %xmm0 ; ALL-NEXT: retq %ext = extractelement <2 x double> %a0, i32 0 @@ -726,7 +726,7 @@ define <4 x float> @fptrunc03(<2 x double> %a0, <4 x float> %a1) nounwind { define <8 x double> @fpext00(<8 x float> %b) nounwind { ; ALL-LABEL: fpext00: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtps2pd %ymm0, %zmm0 ; ALL-NEXT: retq %a = fpext <8 x float> %b to <8 x double> @@ -735,14 +735,14 @@ define <8 x double> @fpext00(<8 x float> %b) nounwind { define <4 x double> @fpext01(<4 x float> %b, <4 x double>%b1, <4 x double>%a1) { ; NOVL-LABEL: fpext01: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vcvtps2pd %xmm0, %ymm0 ; NOVL-NEXT: vcmpltpd %ymm2, %ymm1, %ymm1 ; NOVL-NEXT: vandpd %ymm0, %ymm1, %ymm0 ; NOVL-NEXT: retq ; ; VL-LABEL: fpext01: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vcmpltpd %ymm2, %ymm1, %k1 ; VL-NEXT: vcvtps2pd %xmm0, %ymm0 {%k1} {z} ; VL-NEXT: retq @@ -754,7 +754,7 @@ define <4 x double> @fpext01(<4 x float> %b, <4 x double>%b1, <4 x double>%a1) { define <2 x double> @fpext02(<2 x double> %a0, <4 x float> %a1) nounwind { ; ALL-LABEL: fpext02: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 ; ALL-NEXT: retq %ext = extractelement <4 x float> %a1, i32 0 @@ -765,7 +765,7 @@ define <2 x double> @fpext02(<2 x double> %a0, <4 x float> %a1) nounwind { define double @funcA(i64* nocapture %e) { ; ALL-LABEL: funcA: -; ALL: ## BB#0: ## %entry +; ALL: # BB#0: # %entry ; ALL-NEXT: vcvtsi2sdq (%rdi), %xmm0, %xmm0 ; ALL-NEXT: retq entry: @@ -776,7 +776,7 @@ entry: define double @funcB(i32* %e) { ; ALL-LABEL: funcB: -; ALL: ## BB#0: ## %entry +; ALL: # BB#0: # %entry ; ALL-NEXT: vcvtsi2sdl (%rdi), %xmm0, %xmm0 ; ALL-NEXT: retq entry: @@ -787,7 +787,7 @@ entry: define float @funcC(i32* %e) { ; ALL-LABEL: funcC: -; ALL: ## BB#0: ## %entry +; ALL: # BB#0: # %entry ; ALL-NEXT: vcvtsi2ssl (%rdi), %xmm0, %xmm0 ; ALL-NEXT: retq entry: @@ -798,7 +798,7 @@ entry: define float @i64tof32(i64* %e) { ; ALL-LABEL: i64tof32: -; ALL: ## BB#0: ## %entry +; ALL: # BB#0: # %entry ; ALL-NEXT: vcvtsi2ssq (%rdi), %xmm0, %xmm0 ; ALL-NEXT: retq entry: @@ -809,7 +809,7 @@ entry: define void @fpext() { ; ALL-LABEL: fpext: -; ALL: ## BB#0: ## %entry +; ALL: # BB#0: # %entry ; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; ALL-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 ; ALL-NEXT: vmovsd %xmm0, -{{[0-9]+}}(%rsp) @@ -825,7 +825,7 @@ entry: define void @fpround_scalar() nounwind uwtable { ; ALL-LABEL: fpround_scalar: -; ALL: ## BB#0: ## %entry +; ALL: # BB#0: # %entry ; ALL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; ALL-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 ; ALL-NEXT: vmovss %xmm0, -{{[0-9]+}}(%rsp) @@ -841,7 +841,7 @@ entry: define double @long_to_double(i64 %x) { ; ALL-LABEL: long_to_double: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vmovq %rdi, %xmm0 ; ALL-NEXT: retq %res = bitcast i64 %x to double @@ -850,7 +850,7 @@ define double @long_to_double(i64 %x) { define i64 @double_to_long(double %x) { ; ALL-LABEL: double_to_long: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vmovq %xmm0, %rax ; ALL-NEXT: retq %res = bitcast double %x to i64 @@ -859,7 +859,7 @@ define i64 @double_to_long(double %x) { define float @int_to_float(i32 %x) { ; ALL-LABEL: int_to_float: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vmovd %edi, %xmm0 ; ALL-NEXT: retq %res = bitcast i32 %x to float @@ -868,7 +868,7 @@ define float @int_to_float(i32 %x) { define i32 @float_to_int(float %x) { ; ALL-LABEL: float_to_int: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vmovd %xmm0, %eax ; ALL-NEXT: retq %res = bitcast float %x to i32 @@ -877,7 +877,7 @@ define i32 @float_to_int(float %x) { define <16 x double> @uitof64(<16 x i32> %a) nounwind { ; NODQ-LABEL: uitof64: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vcvtudq2pd %ymm0, %zmm2 ; NODQ-NEXT: vextracti64x4 $1, %zmm0, %ymm0 ; NODQ-NEXT: vcvtudq2pd %ymm0, %zmm1 @@ -885,7 +885,7 @@ define <16 x double> @uitof64(<16 x i32> %a) nounwind { ; NODQ-NEXT: retq ; ; DQ-LABEL: uitof64: -; DQ: ## BB#0: +; DQ: # BB#0: ; DQ-NEXT: vcvtudq2pd %ymm0, %zmm2 ; DQ-NEXT: vextracti32x8 $1, %zmm0, %ymm0 ; DQ-NEXT: vcvtudq2pd %ymm0, %zmm1 @@ -896,31 +896,31 @@ define <16 x double> @uitof64(<16 x i32> %a) nounwind { } define <8 x double> @uitof64_mask(<8 x double> %a, <8 x i32> %b, i8 %c) nounwind { ; KNL-LABEL: uitof64_mask: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: kmovw %edi, %k1 ; KNL-NEXT: vcvtudq2pd %ymm1, %zmm0 {%k1} ; KNL-NEXT: retq ; ; VLBW-LABEL: uitof64_mask: -; VLBW: ## BB#0: +; VLBW: # BB#0: ; VLBW-NEXT: kmovd %edi, %k1 ; VLBW-NEXT: vcvtudq2pd %ymm1, %zmm0 {%k1} ; VLBW-NEXT: retq ; ; VLNOBW-LABEL: uitof64_mask: -; VLNOBW: ## BB#0: +; VLNOBW: # BB#0: ; VLNOBW-NEXT: kmovw %edi, %k1 ; VLNOBW-NEXT: vcvtudq2pd %ymm1, %zmm0 {%k1} ; VLNOBW-NEXT: retq ; ; AVX512DQ-LABEL: uitof64_mask: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: kmovw %edi, %k1 ; AVX512DQ-NEXT: vcvtudq2pd %ymm1, %zmm0 {%k1} ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: uitof64_mask: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: kmovd %edi, %k1 ; AVX512BW-NEXT: vcvtudq2pd %ymm1, %zmm0 {%k1} ; AVX512BW-NEXT: retq @@ -931,31 +931,31 @@ define <8 x double> @uitof64_mask(<8 x double> %a, <8 x i32> %b, i8 %c) nounwind } define <8 x double> @uitof64_maskz(<8 x i32> %a, i8 %b) nounwind { ; KNL-LABEL: uitof64_maskz: -; KNL: ## BB#0: +; KNL: # BB#0: ; KNL-NEXT: kmovw %edi, %k1 ; KNL-NEXT: vcvtudq2pd %ymm0, %zmm0 {%k1} {z} ; KNL-NEXT: retq ; ; VLBW-LABEL: uitof64_maskz: -; VLBW: ## BB#0: +; VLBW: # BB#0: ; VLBW-NEXT: kmovd %edi, %k1 ; VLBW-NEXT: vcvtudq2pd %ymm0, %zmm0 {%k1} {z} ; VLBW-NEXT: retq ; ; VLNOBW-LABEL: uitof64_maskz: -; VLNOBW: ## BB#0: +; VLNOBW: # BB#0: ; VLNOBW-NEXT: kmovw %edi, %k1 ; VLNOBW-NEXT: vcvtudq2pd %ymm0, %zmm0 {%k1} {z} ; VLNOBW-NEXT: retq ; ; AVX512DQ-LABEL: uitof64_maskz: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: kmovw %edi, %k1 ; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0 {%k1} {z} ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: uitof64_maskz: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: kmovd %edi, %k1 ; AVX512BW-NEXT: vcvtudq2pd %ymm0, %zmm0 {%k1} {z} ; AVX512BW-NEXT: retq @@ -967,14 +967,14 @@ define <8 x double> @uitof64_maskz(<8 x i32> %a, i8 %b) nounwind { define <4 x double> @uitof64_256(<4 x i32> %a) nounwind { ; NOVL-LABEL: uitof64_256: -; NOVL: ## BB#0: -; NOVL-NEXT: ## kill: %XMM0 %XMM0 %YMM0 +; NOVL: # BB#0: +; NOVL-NEXT: # kill: %XMM0 %XMM0 %YMM0 ; NOVL-NEXT: vcvtudq2pd %ymm0, %zmm0 -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: retq ; ; VL-LABEL: uitof64_256: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vcvtudq2pd %xmm0, %ymm0 ; VL-NEXT: retq %b = uitofp <4 x i32> %a to <4 x double> @@ -983,7 +983,7 @@ define <4 x double> @uitof64_256(<4 x i32> %a) nounwind { define <16 x float> @uitof32(<16 x i32> %a) nounwind { ; ALL-LABEL: uitof32: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtudq2ps %zmm0, %zmm0 ; ALL-NEXT: retq %b = uitofp <16 x i32> %a to <16 x float> @@ -992,14 +992,14 @@ define <16 x float> @uitof32(<16 x i32> %a) nounwind { define <8 x float> @uitof32_256(<8 x i32> %a) nounwind { ; NOVL-LABEL: uitof32_256: -; NOVL: ## BB#0: -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL: # BB#0: +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: vcvtudq2ps %zmm0, %zmm0 -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: retq ; ; VL-LABEL: uitof32_256: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vcvtudq2ps %ymm0, %ymm0 ; VL-NEXT: retq %b = uitofp <8 x i32> %a to <8 x float> @@ -1008,30 +1008,30 @@ define <8 x float> @uitof32_256(<8 x i32> %a) nounwind { define <4 x float> @uitof32_128(<4 x i32> %a) nounwind { ; KNL-LABEL: uitof32_128: -; KNL: ## BB#0: -; KNL-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; KNL: # BB#0: +; KNL-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; KNL-NEXT: vcvtudq2ps %zmm0, %zmm0 -; KNL-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; KNL-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; KNL-NEXT: retq ; ; VL-LABEL: uitof32_128: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vcvtudq2ps %xmm0, %xmm0 ; VL-NEXT: retq ; ; AVX512DQ-LABEL: uitof32_128: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0 -; AVX512DQ-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512DQ-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: retq ; ; AVX512BW-LABEL: uitof32_128: -; AVX512BW: ## BB#0: -; AVX512BW-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512BW: # BB#0: +; AVX512BW-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512BW-NEXT: vcvtudq2ps %zmm0, %zmm0 -; AVX512BW-NEXT: ## kill: %XMM0 %XMM0 %ZMM0 +; AVX512BW-NEXT: # kill: %XMM0 %XMM0 %ZMM0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq %b = uitofp <4 x i32> %a to <4 x float> @@ -1040,7 +1040,7 @@ define <4 x float> @uitof32_128(<4 x i32> %a) nounwind { define i32 @fptosi02(float %a) nounwind { ; ALL-LABEL: fptosi02: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvttss2si %xmm0, %eax ; ALL-NEXT: retq %b = fptosi float %a to i32 @@ -1049,7 +1049,7 @@ define i32 @fptosi02(float %a) nounwind { define i32 @fptoui02(float %a) nounwind { ; ALL-LABEL: fptoui02: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvttss2usi %xmm0, %eax ; ALL-NEXT: retq %b = fptoui float %a to i32 @@ -1058,7 +1058,7 @@ define i32 @fptoui02(float %a) nounwind { define float @uitofp02(i32 %a) nounwind { ; ALL-LABEL: uitofp02: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtusi2ssl %edi, %xmm0, %xmm0 ; ALL-NEXT: retq %b = uitofp i32 %a to float @@ -1067,7 +1067,7 @@ define float @uitofp02(i32 %a) nounwind { define double @uitofp03(i32 %a) nounwind { ; ALL-LABEL: uitofp03: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vcvtusi2sdl %edi, %xmm0, %xmm0 ; ALL-NEXT: retq %b = uitofp i32 %a to double @@ -1076,7 +1076,7 @@ define double @uitofp03(i32 %a) nounwind { define <16 x float> @sitofp_16i1_float(<16 x i32> %a) { ; NODQ-LABEL: sitofp_16i1_float: -; NODQ: ## BB#0: +; NODQ: # BB#0: ; NODQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; NODQ-NEXT: vpcmpgtd %zmm0, %zmm1, %k1 ; NODQ-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} @@ -1084,7 +1084,7 @@ define <16 x float> @sitofp_16i1_float(<16 x i32> %a) { ; NODQ-NEXT: retq ; ; DQ-LABEL: sitofp_16i1_float: -; DQ: ## BB#0: +; DQ: # BB#0: ; DQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; DQ-NEXT: vpcmpgtd %zmm0, %zmm1, %k0 ; DQ-NEXT: vpmovm2d %k0, %zmm0 @@ -1097,7 +1097,7 @@ define <16 x float> @sitofp_16i1_float(<16 x i32> %a) { define <16 x float> @sitofp_16i8_float(<16 x i8> %a) { ; ALL-LABEL: sitofp_16i8_float: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vpmovsxbd %xmm0, %zmm0 ; ALL-NEXT: vcvtdq2ps %zmm0, %zmm0 ; ALL-NEXT: retq @@ -1107,7 +1107,7 @@ define <16 x float> @sitofp_16i8_float(<16 x i8> %a) { define <16 x float> @sitofp_16i16_float(<16 x i16> %a) { ; ALL-LABEL: sitofp_16i16_float: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vpmovsxwd %ymm0, %zmm0 ; ALL-NEXT: vcvtdq2ps %zmm0, %zmm0 ; ALL-NEXT: retq @@ -1117,7 +1117,7 @@ define <16 x float> @sitofp_16i16_float(<16 x i16> %a) { define <8 x double> @sitofp_8i16_double(<8 x i16> %a) { ; ALL-LABEL: sitofp_8i16_double: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vpmovsxwd %xmm0, %ymm0 ; ALL-NEXT: vcvtdq2pd %ymm0, %zmm0 ; ALL-NEXT: retq @@ -1127,7 +1127,7 @@ define <8 x double> @sitofp_8i16_double(<8 x i16> %a) { define <8 x double> @sitofp_8i8_double(<8 x i8> %a) { ; ALL-LABEL: sitofp_8i8_double: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero ; ALL-NEXT: vpslld $24, %ymm0, %ymm0 ; ALL-NEXT: vpsrad $24, %ymm0, %ymm0 @@ -1139,7 +1139,7 @@ define <8 x double> @sitofp_8i8_double(<8 x i8> %a) { define <16 x double> @sitofp_16i1_double(<16 x double> %a) { ; NOVLDQ-LABEL: sitofp_16i1_double: -; NOVLDQ: ## BB#0: +; NOVLDQ: # BB#0: ; NOVLDQ-NEXT: vpxord %zmm2, %zmm2, %zmm2 ; NOVLDQ-NEXT: vcmpltpd %zmm1, %zmm2, %k1 ; NOVLDQ-NEXT: vcmpltpd %zmm0, %zmm2, %k2 @@ -1152,7 +1152,7 @@ define <16 x double> @sitofp_16i1_double(<16 x double> %a) { ; NOVLDQ-NEXT: retq ; ; VLDQ-LABEL: sitofp_16i1_double: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vxorpd %zmm2, %zmm2, %zmm2 ; VLDQ-NEXT: vcmpltpd %zmm1, %zmm2, %k0 ; VLDQ-NEXT: vcmpltpd %zmm0, %zmm2, %k1 @@ -1163,7 +1163,7 @@ define <16 x double> @sitofp_16i1_double(<16 x double> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sitofp_16i1_double: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxord %zmm2, %zmm2, %zmm2 ; VLNODQ-NEXT: vcmpltpd %zmm1, %zmm2, %k1 ; VLNODQ-NEXT: vcmpltpd %zmm0, %zmm2, %k2 @@ -1175,7 +1175,7 @@ define <16 x double> @sitofp_16i1_double(<16 x double> %a) { ; VLNODQ-NEXT: retq ; ; AVX512DQ-LABEL: sitofp_16i1_double: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: vxorpd %zmm2, %zmm2, %zmm2 ; AVX512DQ-NEXT: vcmpltpd %zmm1, %zmm2, %k0 ; AVX512DQ-NEXT: vcmpltpd %zmm0, %zmm2, %k1 @@ -1191,7 +1191,7 @@ define <16 x double> @sitofp_16i1_double(<16 x double> %a) { define <8 x double> @sitofp_8i1_double(<8 x double> %a) { ; NOVLDQ-LABEL: sitofp_8i1_double: -; NOVLDQ: ## BB#0: +; NOVLDQ: # BB#0: ; NOVLDQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; NOVLDQ-NEXT: vcmpltpd %zmm0, %zmm1, %k1 ; NOVLDQ-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} @@ -1200,7 +1200,7 @@ define <8 x double> @sitofp_8i1_double(<8 x double> %a) { ; NOVLDQ-NEXT: retq ; ; VLDQ-LABEL: sitofp_8i1_double: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vxorpd %zmm1, %zmm1, %zmm1 ; VLDQ-NEXT: vcmpltpd %zmm0, %zmm1, %k0 ; VLDQ-NEXT: vpmovm2d %k0, %ymm0 @@ -1208,7 +1208,7 @@ define <8 x double> @sitofp_8i1_double(<8 x double> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sitofp_8i1_double: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; VLNODQ-NEXT: vcmpltpd %zmm0, %zmm1, %k1 ; VLNODQ-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm0 @@ -1217,7 +1217,7 @@ define <8 x double> @sitofp_8i1_double(<8 x double> %a) { ; VLNODQ-NEXT: retq ; ; AVX512DQ-LABEL: sitofp_8i1_double: -; AVX512DQ: ## BB#0: +; AVX512DQ: # BB#0: ; AVX512DQ-NEXT: vxorpd %zmm1, %zmm1, %zmm1 ; AVX512DQ-NEXT: vcmpltpd %zmm0, %zmm1, %k0 ; AVX512DQ-NEXT: vpmovm2d %k0, %zmm0 @@ -1230,8 +1230,8 @@ define <8 x double> @sitofp_8i1_double(<8 x double> %a) { define <8 x float> @sitofp_8i1_float(<8 x float> %a) { ; NOVLDQ-LABEL: sitofp_8i1_float: -; NOVLDQ: ## BB#0: -; NOVLDQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVLDQ: # BB#0: +; NOVLDQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVLDQ-NEXT: vxorps %ymm1, %ymm1, %ymm1 ; NOVLDQ-NEXT: vcmpltps %zmm0, %zmm1, %k1 ; NOVLDQ-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} @@ -1240,7 +1240,7 @@ define <8 x float> @sitofp_8i1_float(<8 x float> %a) { ; NOVLDQ-NEXT: retq ; ; VLDQ-LABEL: sitofp_8i1_float: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vxorps %ymm1, %ymm1, %ymm1 ; VLDQ-NEXT: vcmpltps %ymm0, %ymm1, %k0 ; VLDQ-NEXT: vpmovm2d %k0, %ymm0 @@ -1248,7 +1248,7 @@ define <8 x float> @sitofp_8i1_float(<8 x float> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sitofp_8i1_float: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxor %ymm1, %ymm1, %ymm1 ; VLNODQ-NEXT: vcmpltps %ymm0, %ymm1, %k1 ; VLNODQ-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm0 @@ -1257,8 +1257,8 @@ define <8 x float> @sitofp_8i1_float(<8 x float> %a) { ; VLNODQ-NEXT: retq ; ; AVX512DQ-LABEL: sitofp_8i1_float: -; AVX512DQ: ## BB#0: -; AVX512DQ-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; AVX512DQ: # BB#0: +; AVX512DQ-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512DQ-NEXT: vxorps %ymm1, %ymm1, %ymm1 ; AVX512DQ-NEXT: vcmpltps %zmm0, %zmm1, %k0 ; AVX512DQ-NEXT: vpmovm2d %k0, %zmm0 @@ -1271,14 +1271,14 @@ define <8 x float> @sitofp_8i1_float(<8 x float> %a) { define <4 x float> @sitofp_4i1_float(<4 x float> %a) { ; NOVL-LABEL: sitofp_4i1_float: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; NOVL-NEXT: vcmpltps %xmm0, %xmm1, %xmm0 ; NOVL-NEXT: vcvtdq2ps %xmm0, %xmm0 ; NOVL-NEXT: retq ; ; VLDQ-LABEL: sitofp_4i1_float: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; VLDQ-NEXT: vcmpltps %xmm0, %xmm1, %k0 ; VLDQ-NEXT: vpmovm2d %k0, %xmm0 @@ -1286,7 +1286,7 @@ define <4 x float> @sitofp_4i1_float(<4 x float> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sitofp_4i1_float: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VLNODQ-NEXT: vcmpltps %xmm0, %xmm1, %k1 ; VLNODQ-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 @@ -1300,7 +1300,7 @@ define <4 x float> @sitofp_4i1_float(<4 x float> %a) { define <4 x double> @sitofp_4i1_double(<4 x double> %a) { ; NOVL-LABEL: sitofp_4i1_double: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vxorpd %ymm1, %ymm1, %ymm1 ; NOVL-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 ; NOVL-NEXT: vpmovqd %zmm0, %ymm0 @@ -1308,7 +1308,7 @@ define <4 x double> @sitofp_4i1_double(<4 x double> %a) { ; NOVL-NEXT: retq ; ; VLDQ-LABEL: sitofp_4i1_double: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vxorpd %ymm1, %ymm1, %ymm1 ; VLDQ-NEXT: vcmpltpd %ymm0, %ymm1, %k0 ; VLDQ-NEXT: vpmovm2d %k0, %xmm0 @@ -1316,7 +1316,7 @@ define <4 x double> @sitofp_4i1_double(<4 x double> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sitofp_4i1_double: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxor %ymm1, %ymm1, %ymm1 ; VLNODQ-NEXT: vcmpltpd %ymm0, %ymm1, %k1 ; VLNODQ-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 @@ -1330,14 +1330,14 @@ define <4 x double> @sitofp_4i1_double(<4 x double> %a) { define <2 x float> @sitofp_2i1_float(<2 x float> %a) { ; NOVL-LABEL: sitofp_2i1_float: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; NOVL-NEXT: vcmpltps %xmm0, %xmm1, %xmm0 ; NOVL-NEXT: vcvtdq2ps %xmm0, %xmm0 ; NOVL-NEXT: retq ; ; VLDQ-LABEL: sitofp_2i1_float: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; VLDQ-NEXT: vcmpltps %xmm0, %xmm1, %k0 ; VLDQ-NEXT: vpmovm2d %k0, %xmm0 @@ -1345,7 +1345,7 @@ define <2 x float> @sitofp_2i1_float(<2 x float> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sitofp_2i1_float: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VLNODQ-NEXT: vcmpltps %xmm0, %xmm1, %k1 ; VLNODQ-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 @@ -1359,7 +1359,7 @@ define <2 x float> @sitofp_2i1_float(<2 x float> %a) { define <2 x double> @sitofp_2i1_double(<2 x double> %a) { ; NOVL-LABEL: sitofp_2i1_double: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vxorpd %xmm1, %xmm1, %xmm1 ; NOVL-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0 ; NOVL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3] @@ -1367,7 +1367,7 @@ define <2 x double> @sitofp_2i1_double(<2 x double> %a) { ; NOVL-NEXT: retq ; ; VLDQ-LABEL: sitofp_2i1_double: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vxorpd %xmm1, %xmm1, %xmm1 ; VLDQ-NEXT: vcmpltpd %xmm0, %xmm1, %k0 ; VLDQ-NEXT: vpmovm2q %k0, %xmm0 @@ -1375,7 +1375,7 @@ define <2 x double> @sitofp_2i1_double(<2 x double> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: sitofp_2i1_double: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VLNODQ-NEXT: vcmpltpd %xmm0, %xmm1, %k1 ; VLNODQ-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 @@ -1393,7 +1393,7 @@ define <2 x double> @sitofp_2i1_double(<2 x double> %a) { define <16 x float> @uitofp_16i8(<16 x i8>%a) { ; ALL-LABEL: uitofp_16i8: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero ; ALL-NEXT: vcvtdq2ps %zmm0, %zmm0 ; ALL-NEXT: retq @@ -1403,7 +1403,7 @@ define <16 x float> @uitofp_16i8(<16 x i8>%a) { define <16 x float> @uitofp_16i16(<16 x i16>%a) { ; ALL-LABEL: uitofp_16i16: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero ; ALL-NEXT: vcvtdq2ps %zmm0, %zmm0 ; ALL-NEXT: retq @@ -1413,7 +1413,7 @@ define <16 x float> @uitofp_16i16(<16 x i16>%a) { define <16 x float> @uitofp_16i1_float(<16 x i32> %a) { ; ALL-LABEL: uitofp_16i1_float: -; ALL: ## BB#0: +; ALL: # BB#0: ; ALL-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; ALL-NEXT: vpcmpgtd %zmm0, %zmm1, %k1 ; ALL-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z} @@ -1426,7 +1426,7 @@ define <16 x float> @uitofp_16i1_float(<16 x i32> %a) { define <16 x double> @uitofp_16i1_double(<16 x i32> %a) { ; NOVL-LABEL: uitofp_16i1_double: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; NOVL-NEXT: vpcmpgtd %zmm0, %zmm1, %k1 ; NOVL-NEXT: movq {{.*}}(%rip), %rax @@ -1440,7 +1440,7 @@ define <16 x double> @uitofp_16i1_double(<16 x i32> %a) { ; NOVL-NEXT: retq ; ; VL-LABEL: uitofp_16i1_double: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; VL-NEXT: vpcmpgtd %zmm0, %zmm1, %k1 ; VL-NEXT: movl {{.*}}(%rip), %eax @@ -1457,18 +1457,18 @@ define <16 x double> @uitofp_16i1_double(<16 x i32> %a) { define <8 x float> @uitofp_8i1_float(<8 x i32> %a) { ; NOVL-LABEL: uitofp_8i1_float: -; NOVL: ## BB#0: -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL: # BB#0: +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: vpxor %ymm1, %ymm1, %ymm1 ; NOVL-NEXT: vpcmpgtd %zmm0, %zmm1, %k1 ; NOVL-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z} ; NOVL-NEXT: vpmovqd %zmm0, %ymm0 ; NOVL-NEXT: vcvtudq2ps %zmm0, %zmm0 -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: retq ; ; VL-LABEL: uitofp_8i1_float: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vpxor %ymm1, %ymm1, %ymm1 ; VL-NEXT: vpcmpgtd %ymm0, %ymm1, %k1 ; VL-NEXT: vpbroadcastd {{.*}}(%rip), %ymm0 {%k1} {z} @@ -1481,8 +1481,8 @@ define <8 x float> @uitofp_8i1_float(<8 x i32> %a) { define <8 x double> @uitofp_8i1_double(<8 x i32> %a) { ; NOVL-LABEL: uitofp_8i1_double: -; NOVL: ## BB#0: -; NOVL-NEXT: ## kill: %YMM0 %YMM0 %ZMM0 +; NOVL: # BB#0: +; NOVL-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; NOVL-NEXT: vpxor %ymm1, %ymm1, %ymm1 ; NOVL-NEXT: vpcmpgtd %zmm0, %zmm1, %k1 ; NOVL-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z} @@ -1491,7 +1491,7 @@ define <8 x double> @uitofp_8i1_double(<8 x i32> %a) { ; NOVL-NEXT: retq ; ; VL-LABEL: uitofp_8i1_double: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vpxor %ymm1, %ymm1, %ymm1 ; VL-NEXT: vpcmpgtd %ymm0, %ymm1, %k1 ; VL-NEXT: vpbroadcastd {{.*}}(%rip), %ymm0 {%k1} {z} @@ -1504,7 +1504,7 @@ define <8 x double> @uitofp_8i1_double(<8 x i32> %a) { define <4 x float> @uitofp_4i1_float(<4 x i32> %a) { ; NOVL-LABEL: uitofp_4i1_float: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; NOVL-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0 ; NOVL-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1 @@ -1512,7 +1512,7 @@ define <4 x float> @uitofp_4i1_float(<4 x i32> %a) { ; NOVL-NEXT: retq ; ; VL-LABEL: uitofp_4i1_float: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VL-NEXT: vpcmpgtd %xmm0, %xmm1, %k1 ; VL-NEXT: vpbroadcastd {{.*}}(%rip), %xmm0 {%k1} {z} @@ -1525,7 +1525,7 @@ define <4 x float> @uitofp_4i1_float(<4 x i32> %a) { define <4 x double> @uitofp_4i1_double(<4 x i32> %a) { ; NOVL-LABEL: uitofp_4i1_double: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; NOVL-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0 ; NOVL-NEXT: vpsrld $31, %xmm0, %xmm0 @@ -1533,7 +1533,7 @@ define <4 x double> @uitofp_4i1_double(<4 x i32> %a) { ; NOVL-NEXT: retq ; ; VL-LABEL: uitofp_4i1_double: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VL-NEXT: vpcmpgtd %xmm0, %xmm1, %k1 ; VL-NEXT: vpbroadcastd {{.*}}(%rip), %xmm0 {%k1} {z} @@ -1546,7 +1546,7 @@ define <4 x double> @uitofp_4i1_double(<4 x i32> %a) { define <2 x float> @uitofp_2i1_float(<2 x i32> %a) { ; NOVL-LABEL: uitofp_2i1_float: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; NOVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] ; NOVL-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808] @@ -1562,7 +1562,7 @@ define <2 x float> @uitofp_2i1_float(<2 x i32> %a) { ; NOVL-NEXT: retq ; ; VL-LABEL: uitofp_2i1_float: -; VL: ## BB#0: +; VL: # BB#0: ; VL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] ; VL-NEXT: vpcmpltuq %xmm1, %xmm0, %k1 @@ -1576,7 +1576,7 @@ define <2 x float> @uitofp_2i1_float(<2 x i32> %a) { define <2 x double> @uitofp_2i1_double(<2 x i32> %a) { ; NOVL-LABEL: uitofp_2i1_double: -; NOVL: ## BB#0: +; NOVL: # BB#0: ; NOVL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; NOVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] ; NOVL-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808] @@ -1586,7 +1586,7 @@ define <2 x double> @uitofp_2i1_double(<2 x i32> %a) { ; NOVL-NEXT: retq ; ; VLDQ-LABEL: uitofp_2i1_double: -; VLDQ: ## BB#0: +; VLDQ: # BB#0: ; VLDQ-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VLDQ-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] ; VLDQ-NEXT: vpcmpltuq %xmm1, %xmm0, %k1 @@ -1595,7 +1595,7 @@ define <2 x double> @uitofp_2i1_double(<2 x i32> %a) { ; VLDQ-NEXT: retq ; ; VLNODQ-LABEL: uitofp_2i1_double: -; VLNODQ: ## BB#0: +; VLNODQ: # BB#0: ; VLNODQ-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; VLNODQ-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] ; VLNODQ-NEXT: vpcmpltuq %xmm1, %xmm0, %k1