From: Sanjay Patel Date: Fri, 17 Mar 2017 20:29:40 +0000 (+0000) Subject: [x86] clean up setcc with negated operand transform and add missing test; NFCI X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=d0f7ad81d5b5ed3861a21d44069b32cbc6722d60;p=llvm [x86] clean up setcc with negated operand transform and add missing test; NFCI git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298118 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index a7e82493b1f..d529b1d0894 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -33954,8 +33954,6 @@ static SDValue combineZext(SDNode *N, SelectionDAG &DAG, return SDValue(); } -/// Optimize x == -y --> x+y == 0 -/// x != -y --> x+y != 0 static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG, const X86Subtarget &Subtarget) { ISD::CondCode CC = cast(N->getOperand(2))->get(); @@ -33964,20 +33962,23 @@ static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG, EVT VT = N->getValueType(0); SDLoc DL(N); - if ((CC == ISD::SETNE || CC == ISD::SETEQ) && LHS.getOpcode() == ISD::SUB) - if (isNullConstant(LHS.getOperand(0)) && LHS.hasOneUse()) { - SDValue addV = DAG.getNode(ISD::ADD, DL, LHS.getValueType(), RHS, - LHS.getOperand(1)); - return DAG.getSetCC(DL, N->getValueType(0), addV, - DAG.getConstant(0, DL, addV.getValueType()), CC); + if (CC == ISD::SETNE || CC == ISD::SETEQ) { + EVT OpVT = LHS.getValueType(); + // 0-x == y --> x+y == 0 + // 0-x != y --> x+y != 0 + if (LHS.getOpcode() == ISD::SUB && isNullConstant(LHS.getOperand(0)) && + LHS.hasOneUse()) { + SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, RHS, LHS.getOperand(1)); + return DAG.getSetCC(DL, VT, Add, DAG.getConstant(0, DL, OpVT), CC); } - if ((CC == ISD::SETNE || CC == ISD::SETEQ) && RHS.getOpcode() == ISD::SUB) - if (isNullConstant(RHS.getOperand(0)) && RHS.hasOneUse()) { - SDValue addV = DAG.getNode(ISD::ADD, DL, RHS.getValueType(), LHS, - RHS.getOperand(1)); - return DAG.getSetCC(DL, N->getValueType(0), addV, - DAG.getConstant(0, DL, addV.getValueType()), CC); + // x == 0-y --> x+y == 0 + // x != 0-y --> x+y != 0 + if (RHS.getOpcode() == ISD::SUB && isNullConstant(RHS.getOperand(0)) && + RHS.hasOneUse()) { + SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1)); + return DAG.getSetCC(DL, VT, Add, DAG.getConstant(0, DL, OpVT), CC); } + } if (VT.getScalarType() == MVT::i1 && (CC == ISD::SETNE || CC == ISD::SETEQ || ISD::isSignedIntSetCC(CC))) { diff --git a/test/CodeGen/X86/neg_cmp.ll b/test/CodeGen/X86/neg_cmp.ll index 79050720d8e..cc82857706c 100644 --- a/test/CodeGen/X86/neg_cmp.ll +++ b/test/CodeGen/X86/neg_cmp.ll @@ -1,22 +1,50 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s ; rdar://11245199 ; PR12545 -define void @f(i32 %x, i32 %y) nounwind uwtable ssp { -entry: -; CHECK-LABEL: f: -; CHECK-NOT: neg -; CHECK: add + +declare void @g() + +define void @neg_cmp(i32 %x, i32 %y) nounwind { +; CHECK-LABEL: neg_cmp: +; CHECK: # BB#0: +; CHECK-NEXT: addl %esi, %edi +; CHECK-NEXT: jne .LBB0_1 +; CHECK-NEXT: # BB#2: # %if.then +; CHECK-NEXT: jmp g # TAILCALL +; CHECK-NEXT: .LBB0_1: # %if.end +; CHECK-NEXT: retq %sub = sub i32 0, %y %cmp = icmp eq i32 %x, %sub br i1 %cmp, label %if.then, label %if.end -if.then: ; preds = %entry +if.then: tail call void @g() nounwind br label %if.end -if.end: ; preds = %if.then, %entry +if.end: + ret void +} + +define void @neg_cmp_commuted(i32 %x, i32 %y) nounwind { +; CHECK-LABEL: neg_cmp_commuted: +; CHECK: # BB#0: +; CHECK-NEXT: addl %esi, %edi +; CHECK-NEXT: jne .LBB1_1 +; CHECK-NEXT: # BB#2: # %if.then +; CHECK-NEXT: jmp g # TAILCALL +; CHECK-NEXT: .LBB1_1: # %if.end +; CHECK-NEXT: retq + %sub = sub i32 0, %y + %cmp = icmp eq i32 %sub, %x + br i1 %cmp, label %if.then, label %if.end + +if.then: + tail call void @g() nounwind + br label %if.end + +if.end: ret void } -declare void @g()