From: Philip Reames Date: Wed, 19 Jun 2019 21:39:07 +0000 (+0000) Subject: [Tests] Autogen a test so that future changes are understandable X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=cf5225b141fc6bcf3780e01a3e27c8af8884a813;p=llvm [Tests] Autogen a test so that future changes are understandable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363882 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/Transforms/IndVarSimplify/eliminate-comparison.ll b/test/Transforms/IndVarSimplify/eliminate-comparison.ll index a63617e62c0..0c1a262417c 100644 --- a/test/Transforms/IndVarSimplify/eliminate-comparison.ll +++ b/test/Transforms/IndVarSimplify/eliminate-comparison.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -indvars -S < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" @@ -7,10 +8,32 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 ; Indvars should be able to simplify simple comparisons involving ; induction variables. -; CHECK-LABEL: @foo( -; CHECK: %cond = and i1 %tobool.not, true - define void @foo(i64 %n, i32* nocapture %p) nounwind { +; CHECK-LABEL: @foo( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP9:%.*]] = icmp sgt i64 [[N:%.*]], 0 +; CHECK-NEXT: br i1 [[CMP9]], label [[PRE:%.*]], label [[RETURN:%.*]] +; CHECK: pre: +; CHECK-NEXT: [[T3:%.*]] = load i32, i32* [[P:%.*]] +; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp ne i32 [[T3]], 0 +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[PRE]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ] +; CHECK-NEXT: [[COND:%.*]] = and i1 [[TOBOOL_NOT]], true +; CHECK-NEXT: br i1 [[COND]], label [[IF_THEN:%.*]], label [[FOR_INC]] +; CHECK: if.then: +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr [0 x double], [0 x double]* @X, i64 0, i64 [[I]] +; CHECK-NEXT: store double 3.200000e+00, double* [[ARRAYIDX]] +; CHECK-NEXT: br label [[FOR_INC]] +; CHECK: for.inc: +; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I]], 1 +; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp eq i64 [[INC]], [[N]] +; CHECK-NEXT: br i1 [[EXITCOND1]], label [[RETURN_LOOPEXIT:%.*]], label [[LOOP]] +; CHECK: return.loopexit: +; CHECK-NEXT: br label [[RETURN]] +; CHECK: return: +; CHECK-NEXT: ret void +; entry: %cmp9 = icmp sgt i64 %n, 0 br i1 %cmp9, label %pre, label %return @@ -42,10 +65,39 @@ return: ; Don't eliminate an icmp that's contributing to the loop exit test though. -; CHECK-LABEL: @_ZNK4llvm5APInt3ultERKS0_( -; CHECK: %tmp99 = icmp sgt i32 %i, -1 - define i32 @_ZNK4llvm5APInt3ultERKS0_(i32 %tmp2.i1, i64** %tmp65, i64** %tmp73, i64** %tmp82, i64** %tmp90) { +; CHECK-LABEL: @_ZNK4llvm5APInt3ultERKS0_( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[BB18:%.*]] +; CHECK: bb13: +; CHECK-NEXT: [[TMP66:%.*]] = load i64*, i64** [[TMP65:%.*]], align 4 +; CHECK-NEXT: [[TMP68:%.*]] = getelementptr inbounds i64, i64* [[TMP66]], i32 [[I:%.*]] +; CHECK-NEXT: [[TMP69:%.*]] = load i64, i64* [[TMP68]], align 4 +; CHECK-NEXT: [[TMP74:%.*]] = load i64*, i64** [[TMP73:%.*]], align 4 +; CHECK-NEXT: [[TMP76:%.*]] = getelementptr inbounds i64, i64* [[TMP74]], i32 [[I]] +; CHECK-NEXT: [[TMP77:%.*]] = load i64, i64* [[TMP76]], align 4 +; CHECK-NEXT: [[TMP78:%.*]] = icmp ugt i64 [[TMP69]], [[TMP77]] +; CHECK-NEXT: br i1 [[TMP78]], label [[BB20_LOOPEXIT:%.*]], label [[BB15:%.*]] +; CHECK: bb15: +; CHECK-NEXT: [[TMP83:%.*]] = load i64*, i64** [[TMP82:%.*]], align 4 +; CHECK-NEXT: [[TMP85:%.*]] = getelementptr inbounds i64, i64* [[TMP83]], i32 [[I]] +; CHECK-NEXT: [[TMP86:%.*]] = load i64, i64* [[TMP85]], align 4 +; CHECK-NEXT: [[TMP91:%.*]] = load i64*, i64** [[TMP90:%.*]], align 4 +; CHECK-NEXT: [[TMP93:%.*]] = getelementptr inbounds i64, i64* [[TMP91]], i32 [[I]] +; CHECK-NEXT: [[TMP94:%.*]] = load i64, i64* [[TMP93]], align 4 +; CHECK-NEXT: [[TMP95:%.*]] = icmp ult i64 [[TMP86]], [[TMP94]] +; CHECK-NEXT: br i1 [[TMP95]], label [[BB20_LOOPEXIT]], label [[BB17:%.*]] +; CHECK: bb17: +; CHECK-NEXT: [[TMP97:%.*]] = add nsw i32 [[I]], -1 +; CHECK-NEXT: br label [[BB18]] +; CHECK: bb18: +; CHECK-NEXT: [[I]] = phi i32 [ [[TMP2_I1:%.*]], [[ENTRY:%.*]] ], [ [[TMP97]], [[BB17]] ] +; CHECK-NEXT: [[TMP99:%.*]] = icmp sgt i32 [[I]], -1 +; CHECK-NEXT: br i1 [[TMP99]], label [[BB13:%.*]], label [[BB20_LOOPEXIT]] +; CHECK: bb20.loopexit: +; CHECK-NEXT: [[TMP_0_PH:%.*]] = phi i32 [ 0, [[BB18]] ], [ 1, [[BB15]] ], [ 0, [[BB13]] ] +; CHECK-NEXT: ret i32 [[TMP_0_PH]] +; entry: br label %bb18 @@ -85,11 +137,19 @@ bb20.loopexit: ; Indvars should eliminate the icmp here. -; CHECK-LABEL: @func_10( -; CHECK-NOT: icmp -; CHECK: ret void define void @func_10() nounwind { +; CHECK-LABEL: @func_10( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: store i64 [[INDVARS_IV]], i64* null +; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 +; CHECK-NEXT: br i1 false, label [[LOOP]], label [[RETURN:%.*]] +; CHECK: return: +; CHECK-NEXT: ret void +; entry: br label %loop @@ -110,11 +170,44 @@ return: ; PR14432 ; Indvars should not turn the second loop into an infinite one. -; CHECK-LABEL: @func_11( -; CHECK: %tmp5 = icmp ult i32 %__key6.0, 10 -; CHECK-NOT: br i1 true, label %noassert68, label %unrolledend define i32 @func_11() nounwind uwtable { +; CHECK-LABEL: @func_11( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[FORCOND:%.*]] +; CHECK: forcond: +; CHECK-NEXT: [[__KEY6_0:%.*]] = phi i32 [ 2, [[ENTRY:%.*]] ], [ [[TMP37:%.*]], [[NOASSERT:%.*]] ] +; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i32 [[__KEY6_0]], 10 +; CHECK-NEXT: br i1 [[TMP5]], label [[NOASSERT]], label [[FORCOND38_PREHEADER:%.*]] +; CHECK: forcond38.preheader: +; CHECK-NEXT: br label [[FORCOND38:%.*]] +; CHECK: noassert: +; CHECK-NEXT: [[TMP13:%.*]] = sdiv i32 -32768, [[__KEY6_0]] +; CHECK-NEXT: [[TMP2936:%.*]] = shl i32 [[TMP13]], 24 +; CHECK-NEXT: [[SEXT23:%.*]] = shl i32 [[TMP13]], 24 +; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i32 [[TMP2936]], [[SEXT23]] +; CHECK-NEXT: [[TMP37]] = add nuw nsw i32 [[__KEY6_0]], 1 +; CHECK-NEXT: br i1 [[TMP32]], label [[FORCOND]], label [[ASSERT33:%.*]] +; CHECK: assert33: +; CHECK-NEXT: tail call void @llvm.trap() +; CHECK-NEXT: unreachable +; CHECK: forcond38: +; CHECK-NEXT: [[__KEY8_0:%.*]] = phi i32 [ [[TMP81:%.*]], [[NOASSERT68:%.*]] ], [ 2, [[FORCOND38_PREHEADER]] ] +; CHECK-NEXT: [[TMP46:%.*]] = icmp ult i32 [[__KEY8_0]], 10 +; CHECK-NEXT: br i1 [[TMP46]], label [[NOASSERT68]], label [[UNROLLEDEND:%.*]] +; CHECK: noassert68: +; CHECK-NEXT: [[TMP57:%.*]] = sdiv i32 -32768, [[__KEY8_0]] +; CHECK-NEXT: [[SEXT34:%.*]] = shl i32 [[TMP57]], 16 +; CHECK-NEXT: [[SEXT21:%.*]] = shl i32 [[TMP57]], 16 +; CHECK-NEXT: [[TMP76:%.*]] = icmp eq i32 [[SEXT34]], [[SEXT21]] +; CHECK-NEXT: [[TMP81]] = add nuw nsw i32 [[__KEY8_0]], 1 +; CHECK-NEXT: br i1 [[TMP76]], label [[FORCOND38]], label [[ASSERT77:%.*]] +; CHECK: assert77: +; CHECK-NEXT: tail call void @llvm.trap() +; CHECK-NEXT: unreachable +; CHECK: unrolledend: +; CHECK-NEXT: ret i32 0 +; entry: br label %forcond @@ -162,10 +255,42 @@ unrolledend: ; preds = %forcond38 declare void @llvm.trap() noreturn nounwind ; In this case the second loop only has a single iteration, fold the header away -; CHECK-LABEL: @func_12( -; CHECK: %tmp5 = icmp ult i32 %__key6.0, 10 -; CHECK: br i1 true, label %noassert68, label %unrolledend define i32 @func_12() nounwind uwtable { +; CHECK-LABEL: @func_12( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[FORCOND:%.*]] +; CHECK: forcond: +; CHECK-NEXT: [[__KEY6_0:%.*]] = phi i32 [ 2, [[ENTRY:%.*]] ], [ [[TMP37:%.*]], [[NOASSERT:%.*]] ] +; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i32 [[__KEY6_0]], 10 +; CHECK-NEXT: br i1 [[TMP5]], label [[NOASSERT]], label [[FORCOND38_PREHEADER:%.*]] +; CHECK: forcond38.preheader: +; CHECK-NEXT: br label [[FORCOND38:%.*]] +; CHECK: noassert: +; CHECK-NEXT: [[TMP13:%.*]] = sdiv i32 -32768, [[__KEY6_0]] +; CHECK-NEXT: [[TMP2936:%.*]] = shl i32 [[TMP13]], 24 +; CHECK-NEXT: [[SEXT23:%.*]] = shl i32 [[TMP13]], 24 +; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i32 [[TMP2936]], [[SEXT23]] +; CHECK-NEXT: [[TMP37]] = add nuw nsw i32 [[__KEY6_0]], 1 +; CHECK-NEXT: br i1 [[TMP32]], label [[FORCOND]], label [[ASSERT33:%.*]] +; CHECK: assert33: +; CHECK-NEXT: tail call void @llvm.trap() +; CHECK-NEXT: unreachable +; CHECK: forcond38: +; CHECK-NEXT: [[__KEY8_0:%.*]] = phi i32 [ [[TMP81:%.*]], [[NOASSERT68:%.*]] ], [ 2, [[FORCOND38_PREHEADER]] ] +; CHECK-NEXT: br i1 true, label [[NOASSERT68]], label [[UNROLLEDEND:%.*]] +; CHECK: noassert68: +; CHECK-NEXT: [[TMP57:%.*]] = sdiv i32 -32768, [[__KEY8_0]] +; CHECK-NEXT: [[SEXT34:%.*]] = shl i32 [[TMP57]], 16 +; CHECK-NEXT: [[SEXT21:%.*]] = shl i32 [[TMP57]], 16 +; CHECK-NEXT: [[TMP76:%.*]] = icmp ne i32 [[SEXT34]], [[SEXT21]] +; CHECK-NEXT: [[TMP81]] = add nuw nsw i32 [[__KEY8_0]], 1 +; CHECK-NEXT: br i1 [[TMP76]], label [[FORCOND38]], label [[ASSERT77:%.*]] +; CHECK: assert77: +; CHECK-NEXT: tail call void @llvm.trap() +; CHECK-NEXT: unreachable +; CHECK: unrolledend: +; CHECK-NEXT: ret i32 0 +; entry: br label %forcond @@ -214,33 +339,75 @@ declare void @side_effect() define void @func_13(i32* %len.ptr) { ; CHECK-LABEL: @func_13( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], !range !0 +; CHECK-NEXT: [[LEN_SUB_1:%.*]] = add i32 [[LEN]], -1 +; CHECK-NEXT: [[LEN_IS_ZERO:%.*]] = icmp eq i32 [[LEN]], 0 +; CHECK-NEXT: br i1 [[LEN_IS_ZERO]], label [[LEAVE:%.*]], label [[LOOP_PREHEADER:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IV]], [[LEN_SUB_1]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %len = load i32, i32* %len.ptr, !range !0 %len.sub.1 = add i32 %len, -1 %len.is.zero = icmp eq i32 %len, 0 br i1 %len.is.zero, label %leave, label %loop - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] call void @side_effect() %iv.inc = add i32 %iv, 1 %iv.cmp = icmp ult i32 %iv, %len br i1 %iv.cmp, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave - be: +be: call void @side_effect() %be.cond = icmp ult i32 %iv, %len.sub.1 br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } define void @func_14(i32* %len.ptr) { ; CHECK-LABEL: @func_14( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], !range !0 +; CHECK-NEXT: [[LEN_SUB_1:%.*]] = add i32 [[LEN]], -1 +; CHECK-NEXT: [[LEN_IS_ZERO:%.*]] = icmp eq i32 [[LEN]], 0 +; CHECK-NEXT: [[LEN_IS_INT_MIN:%.*]] = icmp eq i32 [[LEN]], -2147483648 +; CHECK-NEXT: [[NO_ENTRY:%.*]] = or i1 [[LEN_IS_ZERO]], [[LEN_IS_INT_MIN]] +; CHECK-NEXT: br i1 [[NO_ENTRY]], label [[LEAVE:%.*]], label [[LOOP_PREHEADER:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp slt i32 [[IV]], [[LEN_SUB_1]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %len = load i32, i32* %len.ptr, !range !0 %len.sub.1 = add i32 %len, -1 %len.is.zero = icmp eq i32 %len, 0 @@ -248,53 +415,93 @@ define void @func_14(i32* %len.ptr) { %no.entry = or i1 %len.is.zero, %len.is.int_min br i1 %no.entry, label %leave, label %loop - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] call void @side_effect() %iv.inc = add i32 %iv, 1 %iv.cmp = icmp slt i32 %iv, %len br i1 %iv.cmp, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave - be: +be: call void @side_effect() %be.cond = icmp slt i32 %iv, %len.sub.1 br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } define void @func_15(i32* %len.ptr) { ; CHECK-LABEL: @func_15( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], !range !0 +; CHECK-NEXT: [[LEN_ADD_1:%.*]] = add i32 [[LEN]], 1 +; CHECK-NEXT: [[LEN_ADD_1_IS_ZERO:%.*]] = icmp eq i32 [[LEN_ADD_1]], 0 +; CHECK-NEXT: br i1 [[LEN_ADD_1_IS_ZERO]], label [[LEAVE:%.*]], label [[LOOP_PREHEADER:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IV]], [[LEN]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %len = load i32, i32* %len.ptr, !range !0 %len.add.1 = add i32 %len, 1 %len.add.1.is.zero = icmp eq i32 %len.add.1, 0 br i1 %len.add.1.is.zero, label %leave, label %loop - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] call void @side_effect() %iv.inc = add i32 %iv, 1 %iv.cmp = icmp ult i32 %iv, %len.add.1 br i1 %iv.cmp, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave - be: +be: call void @side_effect() %be.cond = icmp ult i32 %iv, %len br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } define void @func_16(i32* %len.ptr) { ; CHECK-LABEL: @func_16( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], !range !0 +; CHECK-NEXT: [[LEN_ADD_5:%.*]] = add i32 [[LEN]], 5 +; CHECK-NEXT: [[ENTRY_COND_0:%.*]] = icmp slt i32 [[LEN]], 2147483643 +; CHECK-NEXT: [[ENTRY_COND_1:%.*]] = icmp slt i32 4, [[LEN_ADD_5]] +; CHECK-NEXT: [[ENTRY_COND:%.*]] = and i1 [[ENTRY_COND_0]], [[ENTRY_COND_1]] +; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IV]], [[LEN]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %len = load i32, i32* %len.ptr, !range !0 %len.add.5 = add i32 %len, 5 %entry.cond.0 = icmp slt i32 %len, 2147483643 @@ -302,28 +509,49 @@ define void @func_16(i32* %len.ptr) { %entry.cond = and i1 %entry.cond.0, %entry.cond.1 br i1 %entry.cond, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] call void @side_effect() %iv.inc = add i32 %iv, 1 %iv.add.4 = add i32 %iv, 4 %iv.cmp = icmp slt i32 %iv.add.4, %len.add.5 br i1 %iv.cmp, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave - be: +be: call void @side_effect() %be.cond = icmp slt i32 %iv, %len br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } define void @func_17(i32* %len.ptr) { ; CHECK-LABEL: @func_17( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]] +; CHECK-NEXT: [[LEN_ADD_5:%.*]] = add i32 [[LEN]], -5 +; CHECK-NEXT: [[ENTRY_COND_0:%.*]] = icmp slt i32 [[LEN]], -2147483643 +; CHECK-NEXT: [[ENTRY_COND_1:%.*]] = icmp slt i32 -6, [[LEN_ADD_5]] +; CHECK-NEXT: [[ENTRY_COND:%.*]] = and i1 [[ENTRY_COND_0]], [[ENTRY_COND_1]] +; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV_2:%.*]] = phi i32 [ [[IV_2_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[IV_2_INC]] = add nuw i32 [[IV_2]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp slt i32 [[IV_2]], [[LEN]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %len = load i32, i32* %len.ptr %len.add.5 = add i32 %len, -5 %entry.cond.0 = icmp slt i32 %len, 2147483653 ;; 2147483653 == INT_MIN - (-5) @@ -331,8 +559,7 @@ define void @func_17(i32* %len.ptr) { %entry.cond = and i1 %entry.cond.0, %entry.cond.1 br i1 %entry.cond, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv.2 = phi i32 [ 0, %entry ], [ %iv.2.inc, %be ] %iv = phi i32 [ -6, %entry ], [ %iv.inc, %be ] call void @side_effect() @@ -342,22 +569,46 @@ define void @func_17(i32* %len.ptr) { ; Deduces {-5,+,1} s< (-5 + %len) from {0,+,1} < %len ; since %len s< INT_MIN - (-5) from the entry condition - -; CHECK: br i1 true, label %be, label %leave br i1 %iv.cmp, label %be, label %leave - be: -; CHECK: be: +be: call void @side_effect() %be.cond = icmp slt i32 %iv.2, %len br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } define i1 @func_18(i16* %tmp20, i32* %len.addr) { ; CHECK-LABEL: @func_18( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_ADDR:%.*]], !range !0 +; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[LEN]], 0 +; CHECK-NEXT: br i1 [[TMP18]], label [[BB2:%.*]], label [[BB0_PREHEADER:%.*]] +; CHECK: bb0.preheader: +; CHECK-NEXT: br label [[BB0:%.*]] +; CHECK: bb0: +; CHECK-NEXT: [[VAR_0_IN:%.*]] = phi i32 [ [[VAR_0:%.*]], [[BB1:%.*]] ], [ [[LEN]], [[BB0_PREHEADER]] ] +; CHECK-NEXT: [[VAR_1:%.*]] = phi i32 [ [[TMP30:%.*]], [[BB1]] ], [ 0, [[BB0_PREHEADER]] ] +; CHECK-NEXT: [[VAR_0]] = add nsw i32 [[VAR_0_IN]], -1 +; CHECK-NEXT: br i1 true, label [[STAY:%.*]], label [[BB2_LOOPEXIT:%.*]] +; CHECK: stay: +; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i16, i16* [[TMP20:%.*]], i32 [[VAR_1]] +; CHECK-NEXT: [[TMP26:%.*]] = load i16, i16* [[TMP25]] +; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP26]], 0 +; CHECK-NEXT: br i1 [[TMP29]], label [[BB1]], label [[BB2_LOOPEXIT]] +; CHECK: bb1: +; CHECK-NEXT: [[TMP30]] = add nuw i32 [[VAR_1]], 1 +; CHECK-NEXT: [[TMP31:%.*]] = icmp eq i32 [[VAR_0]], 0 +; CHECK-NEXT: br i1 [[TMP31]], label [[BB3:%.*]], label [[BB0]] +; CHECK: bb2.loopexit: +; CHECK-NEXT: br label [[BB2]] +; CHECK: bb2: +; CHECK-NEXT: ret i1 false +; CHECK: bb3: +; CHECK-NEXT: ret i1 true +; entry: %len = load i32, i32* %len.addr, !range !0 %tmp18 = icmp eq i32 %len, 0 @@ -367,16 +618,13 @@ bb0.preheader: br label %bb0 bb0: -; CHECK: bb0: %var_0.in = phi i32 [ %var_0, %bb1 ], [ %len, %bb0.preheader ] %var_1 = phi i32 [ %tmp30, %bb1 ], [ 0, %bb0.preheader ] %var_0 = add nsw i32 %var_0.in, -1 %tmp23 = icmp ult i32 %var_1, %len -; CHECK: br i1 true, label %stay, label %bb2.loopexit br i1 %tmp23, label %stay, label %bb2 stay: -; CHECK: stay: %tmp25 = getelementptr inbounds i16, i16* %tmp20, i32 %var_1 %tmp26 = load i16, i16* %tmp25 %tmp29 = icmp eq i16 %tmp26, 0 @@ -396,162 +644,258 @@ bb3: define void @func_19(i32* %length.ptr) { ; CHECK-LABEL: @func_19( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], !range !0 +; CHECK-NEXT: [[LENGTH_IS_NONZERO:%.*]] = icmp ne i32 [[LENGTH]], 0 +; CHECK-NEXT: br i1 [[LENGTH_IS_NONZERO]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IV_INC]], [[LENGTH]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %length = load i32, i32* %length.ptr, !range !0 %length.is.nonzero = icmp ne i32 %length, 0 br i1 %length.is.nonzero, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] %iv.inc = add i32 %iv, 1 %range.check = icmp ult i32 %iv, %length br i1 %range.check, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave.loopexit -; CHECK: be: - be: +be: call void @side_effect() %be.cond = icmp slt i32 %iv.inc, %length br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } -define void @func_20(i32* %length.ptr) { ; Like @func_19, but %length is no longer provably positive, so ; %range.check cannot be proved to be always true. - +define void @func_20(i32* %length.ptr) { ; CHECK-LABEL: @func_20( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]] +; CHECK-NEXT: [[LENGTH_IS_NONZERO:%.*]] = icmp ne i32 [[LENGTH]], 0 +; CHECK-NEXT: br i1 [[LENGTH_IS_NONZERO]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: [[RANGE_CHECK:%.*]] = icmp ult i32 [[IV]], [[LENGTH]] +; CHECK-NEXT: br i1 [[RANGE_CHECK]], label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp slt i32 [[IV_INC]], [[LENGTH]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %length = load i32, i32* %length.ptr %length.is.nonzero = icmp ne i32 %length, 0 br i1 %length.is.nonzero, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] %iv.inc = add i32 %iv, 1 %range.check = icmp ult i32 %iv, %length br i1 %range.check, label %be, label %leave -; CHECK: br i1 %range.check, label %be, label %leave.loopexit -; CHECK: be: - be: +be: call void @side_effect() %be.cond = icmp slt i32 %iv.inc, %length br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } -define void @func_21(i32* %length.ptr) { -; CHECK-LABEL: @func_21( - ; This checks that the backedge condition, (I + 1) < Length - 1 implies ; (I + 1) < Length - entry: +define void @func_21(i32* %length.ptr) { +; CHECK-LABEL: @func_21( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], !range !0 +; CHECK-NEXT: [[LIM:%.*]] = sub i32 [[LENGTH]], 1 +; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp sgt i32 [[LENGTH]], 1 +; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp slt i32 [[IV_INC]], [[LIM]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %length = load i32, i32* %length.ptr, !range !0 %lim = sub i32 %length, 1 %entry.cond = icmp sgt i32 %length, 1 br i1 %entry.cond, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] %iv.inc = add i32 %iv, 1 %range.check = icmp slt i32 %iv, %length br i1 %range.check, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave.loopexit -; CHECK: be: - be: +be: call void @side_effect() %be.cond = icmp slt i32 %iv.inc, %lim br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } -define void @func_22(i32* %length.ptr) { -; CHECK-LABEL: @func_22( - ; This checks that the backedge condition, (I + 1) < Length - 1 implies ; (I + 1) < Length - entry: +define void @func_22(i32* %length.ptr) { +; CHECK-LABEL: @func_22( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], !range !0 +; CHECK-NEXT: [[LIM:%.*]] = sub i32 [[LENGTH]], 1 +; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp sgt i32 [[LENGTH]], 1 +; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 0, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp sle i32 [[IV_INC]], [[LIM]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %length = load i32, i32* %length.ptr, !range !0 %lim = sub i32 %length, 1 %entry.cond = icmp sgt i32 %length, 1 br i1 %entry.cond, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %be ] %iv.inc = add i32 %iv, 1 %range.check = icmp sle i32 %iv, %length br i1 %range.check, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave.loopexit -; CHECK: be: - be: +be: call void @side_effect() %be.cond = icmp sle i32 %iv.inc, %lim br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } define void @func_23(i32* %length.ptr) { ; CHECK-LABEL: @func_23( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], !range !0 +; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ult i32 4, [[LENGTH]] +; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_INC:%.*]], [[BE:%.*]] ], [ 4, [[LOOP_PREHEADER]] ] +; CHECK-NEXT: [[IV_INC]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IV_INC]], [[LENGTH]] +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %length = load i32, i32* %length.ptr, !range !0 %entry.cond = icmp ult i32 4, %length br i1 %entry.cond, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv = phi i32 [ 4, %entry ], [ %iv.inc, %be ] %iv.inc = add i32 %iv, 1 %range.check = icmp slt i32 %iv, %length br i1 %range.check, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave.loopexit -; CHECK: be: - be: +be: call void @side_effect() %be.cond = icmp slt i32 %iv.inc, %length br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void } define void @func_24(i32* %init.ptr) { ; CHECK-LABEL: @func_24( - entry: +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INIT:%.*]] = load i32, i32* [[INIT_PTR:%.*]], !range !0 +; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ugt i32 [[INIT]], 4 +; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]] +; CHECK: loop.preheader: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_DEC:%.*]], [[BE:%.*]] ], [ [[INIT]], [[LOOP_PREHEADER]] ] +; CHECK-NEXT: [[IV_DEC]] = add nsw i32 [[IV]], -1 +; CHECK-NEXT: br i1 true, label [[BE]], label [[LEAVE_LOOPEXIT:%.*]] +; CHECK: be: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[BE_COND:%.*]] = icmp sgt i32 [[IV_DEC]], 4 +; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT]] +; CHECK: leave.loopexit: +; CHECK-NEXT: br label [[LEAVE]] +; CHECK: leave: +; CHECK-NEXT: ret void +; +entry: %init = load i32, i32* %init.ptr, !range !0 %entry.cond = icmp ugt i32 %init, 4 br i1 %entry.cond, label %loop, label %leave - loop: -; CHECK: loop: +loop: %iv = phi i32 [ %init, %entry ], [ %iv.dec, %be ] %iv.dec = add i32 %iv, -1 %range.check = icmp sgt i32 %iv, 4 br i1 %range.check, label %be, label %leave -; CHECK: br i1 true, label %be, label %leave.loopexit -; CHECK: be: - be: +be: call void @side_effect() %be.cond = icmp sgt i32 %iv.dec, 4 br i1 %be.cond, label %loop, label %leave - leave: +leave: ret void }