From: Sanjay Patel Date: Mon, 24 Jun 2019 14:47:02 +0000 (+0000) Subject: [InstCombine] add tests for funnel-shift to bswap; NFC X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=cee72c8957c71d157af6c0aa1ae69389383c65ee;p=llvm [InstCombine] add tests for funnel-shift to bswap; NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364184 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/Transforms/InstCombine/fsh.ll b/test/Transforms/InstCombine/fsh.ll index 88e9eb72630..92be6d3795d 100644 --- a/test/Transforms/InstCombine/fsh.ll +++ b/test/Transforms/InstCombine/fsh.ll @@ -538,6 +538,7 @@ define i33 @expanded_fshr_multi_use(i33 %a) { declare i16 @llvm.fshl.i16(i16, i16, i16) declare i16 @llvm.fshr.i16(i16, i16, i16) +declare <3 x i16> @llvm.fshl.v3i16(<3 x i16>, <3 x i16>, <3 x i16>) ; Special-case: rotate a 16-bit value left/right by 8-bits is bswap. @@ -559,6 +560,42 @@ define i16 @fshr_bswap(i16 %x) { ret i16 %r } +define <3 x i16> @fshl_bswap_vector(<3 x i16> %x) { +; CHECK-LABEL: @fshl_bswap_vector( +; CHECK-NEXT: [[R:%.*]] = call <3 x i16> @llvm.fshl.v3i16(<3 x i16> [[X:%.*]], <3 x i16> [[X]], <3 x i16> ) +; CHECK-NEXT: ret <3 x i16> [[R]] +; + %r = call <3 x i16> @llvm.fshl.v3i16(<3 x i16> %x, <3 x i16> %x, <3 x i16> ) + ret <3 x i16> %r +} + +define i16 @fshl_bswap_wrong_op(i16 %x, i16 %y) { +; CHECK-LABEL: @fshl_bswap_wrong_op( +; CHECK-NEXT: [[R:%.*]] = call i16 @llvm.fshl.i16(i16 [[X:%.*]], i16 [[Y:%.*]], i16 8) +; CHECK-NEXT: ret i16 [[R]] +; + %r = call i16 @llvm.fshl.i16(i16 %x, i16 %y, i16 8) + ret i16 %r +} + +define i16 @fshr_bswap_wrong_amount(i16 %x) { +; CHECK-LABEL: @fshr_bswap_wrong_amount( +; CHECK-NEXT: [[R:%.*]] = call i16 @llvm.fshl.i16(i16 [[X:%.*]], i16 [[X]], i16 12) +; CHECK-NEXT: ret i16 [[R]] +; + %r = call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 4) + ret i16 %r +} + +define i32 @fshl_bswap_wrong_width(i32 %x) { +; CHECK-LABEL: @fshl_bswap_wrong_width( +; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 [[X]], i32 8) +; CHECK-NEXT: ret i32 [[R]] +; + %r = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 8) + ret i32 %r +} + define i32 @fshl_mask_args_same1(i32 %a) { ; CHECK-LABEL: @fshl_mask_args_same1( ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[A:%.*]], 16