From: Sanjay Patel <spatel@rotateright.com>
Date: Wed, 14 Aug 2019 19:46:15 +0000 (+0000)
Subject: [SDAG] move variable closer to use; NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=cd4b3e375a8e58fe643f63e26f3b6cb51380041f;p=llvm

[SDAG] move variable closer to use; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368905 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 32d71f26110..be41e12b785 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -9003,7 +9003,6 @@ SelectionDAG::matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
     return SDValue();
 
   SDValue Op = Extract->getOperand(0);
-  unsigned Stages = Log2_32(Op.getValueType().getVectorNumElements());
 
   // Match against one of the candidate binary ops.
   if (llvm::none_of(CandidateBinOps, [Op](ISD::NodeType BinOp) {
@@ -9041,6 +9040,7 @@ SelectionDAG::matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
   // While a partial reduction match would be:
   // <2,3,u,u,u,u,u,u>
   // <1,u,u,u,u,u,u,u>
+  unsigned Stages = Log2_32(Op.getValueType().getVectorNumElements());
   SDValue PrevOp;
   for (unsigned i = 0; i < Stages; ++i) {
     unsigned MaskEnd = (1 << i);