From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Thu, 20 Jun 2019 10:56:37 +0000 (+0000)
Subject: [DAGCombine] Reduce scope of ShAmtVal variable. NFCI.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=c6588e6c21f78e3ae2352ad90d2e18d3a1940e43;p=llvm

[DAGCombine] Reduce scope of ShAmtVal variable. NFCI.

Fixes cppcheck warning.

Use the more capable getAPIntVal() instead of getZExtValue() as well since I'm here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363921 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 33e339de354..5eee749d330 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -9840,14 +9840,13 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
       N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND &&
       N0.hasOneUse()) {
     SDValue ShAmt = N0.getOperand(1);
-    unsigned ShAmtVal = cast<ConstantSDNode>(ShAmt)->getZExtValue();
     if (N0.getOpcode() == ISD::SHL) {
       SDValue InnerZExt = N0.getOperand(0);
       // If the original shl may be shifting out bits, do not perform this
       // transformation.
       unsigned KnownZeroBits = InnerZExt.getValueSizeInBits() -
         InnerZExt.getOperand(0).getValueSizeInBits();
-      if (ShAmtVal > KnownZeroBits)
+      if (cast<ConstantSDNode>(ShAmt)->getAPIntValue().ugt(KnownZeroBits))
         return SDValue();
     }