From: Craig Topper Date: Sat, 5 Jan 2019 23:30:28 +0000 (+0000) Subject: [X86][AsmParser] Don't allow X86::DX in CheckBaseRegAndIndexRegAndScale. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=bfaf433903bc707a4320b02b34e0c39da1fcfc85;p=llvm [X86][AsmParser] Don't allow X86::DX in CheckBaseRegAndIndexRegAndScale. This was here because out and in instructions allow '(%dx)' even though its not a memory reference. To handle this we build a special operand for the DX register reference before we get to the call to CheckBaseRegAndIndexRegAndScale. So we no longer need this special case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350483 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 4801078925c..8f7b24f89bf 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1011,8 +1011,7 @@ static bool CheckBaseRegAndIndexRegAndScale(unsigned BaseReg, unsigned IndexReg, // and then only in non-64-bit modes. if (X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg) && (Is64BitMode || (BaseReg != X86::BX && BaseReg != X86::BP && - BaseReg != X86::SI && BaseReg != X86::DI)) && - BaseReg != X86::DX) { + BaseReg != X86::SI && BaseReg != X86::DI))) { ErrMsg = "invalid 16-bit base register"; return true; }