From: Simon Atanasyan Date: Wed, 18 Jul 2018 14:11:22 +0000 (+0000) Subject: [mips] Fix predicate for the MipsTruncIntFP pattern X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=bd2bb96fb187f28aec8248e3a8f461686f22ea7a;p=llvm [mips] Fix predicate for the MipsTruncIntFP pattern This is a follow-up to the rL337171. This patch fixes regression introduced by the r337171 and enables MipsTruncIntFP pattern. Differential revision: https://reviews.llvm.org/D49469 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337392 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index b17a340faba..dd30e20a743 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -894,7 +894,7 @@ def : MipsPat<(f64 (sint_to_fp GPR64Opnd:$src)), (PseudoCVT_D64_L GPR64Opnd:$src)>, FGR_64; def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), - (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS3, FGR_64; + (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS2, FGR_64; def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src), (TRUNC_L_S FGR32Opnd:$src)>, ISA_MIPS2, FGR_64; def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), diff --git a/test/CodeGen/Mips/double2int.ll b/test/CodeGen/Mips/double2int.ll index 445ccb334a8..f0d8ad28100 100644 --- a/test/CodeGen/Mips/double2int.ll +++ b/test/CodeGen/Mips/double2int.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=mips < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s define i32 @f1(double %d) nounwind readnone { entry: