From: Sanjay Patel <spatel@rotateright.com>
Date: Mon, 9 May 2016 17:31:55 +0000 (+0000)
Subject: [CGP] avoid crashing from weightlessness
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=bc9409d1af748ce704dc9dacd0d05ed36c909db8;p=llvm

[CGP] avoid crashing from weightlessness

It's possible that we have branch weights with 0 values.
In that case, don't try to create an impossible BranchProbability.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268935 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/CodeGenPrepare.cpp b/lib/CodeGen/CodeGenPrepare.cpp
index b5ffbeb3dec..56a1639c8e9 100644
--- a/lib/CodeGen/CodeGenPrepare.cpp
+++ b/lib/CodeGen/CodeGenPrepare.cpp
@@ -4559,9 +4559,11 @@ static bool isFormingBranchFromSelectProfitable(const TargetTransformInfo *TTI,
   if (SI->extractProfMetadata(TrueWeight, FalseWeight)) {
     uint64_t Max = std::max(TrueWeight, FalseWeight);
     uint64_t Sum = TrueWeight + FalseWeight;
-    auto Probability = BranchProbability::getBranchProbability(Max, Sum);
-    if (Probability > TLI->getPredictableBranchThreshold())
-      return true;
+    if (Sum != 0) {
+      auto Probability = BranchProbability::getBranchProbability(Max, Sum);
+      if (Probability > TLI->getPredictableBranchThreshold())
+        return true;
+    }
   }
 
   CmpInst *Cmp = dyn_cast<CmpInst>(SI->getCondition());
diff --git a/test/CodeGen/X86/cmov-into-branch.ll b/test/CodeGen/X86/cmov-into-branch.ll
index 35c1d3498a5..acb5a2bb51f 100644
--- a/test/CodeGen/X86/cmov-into-branch.ll
+++ b/test/CodeGen/X86/cmov-into-branch.ll
@@ -114,8 +114,22 @@ define i32 @weighted_select3(i32 %a, i32 %b) {
   ret i32 %sel
 }
 
+; Weightlessness is no reason to die.
+define i32 @unweighted_select(i32 %a, i32 %b) {
+; CHECK-LABEL: unweighted_select:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    testl %edi, %edi
+; CHECK-NEXT:    cmovnel %edi, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
+;
+  %cmp = icmp ne i32 %a, 0
+  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !3
+  ret i32 %sel
+}
 
 !0 = !{!"branch_weights", i32 1, i32 99}
 !1 = !{!"branch_weights", i32 1, i32 100}
 !2 = !{!"branch_weights", i32 100, i32 1}
+!3 = !{!"branch_weights", i32 0, i32 0}