From: Coby Tayree Date: Mon, 21 Nov 2016 15:50:56 +0000 (+0000) Subject: small fixup which enables the issuing of the aforementioned instruction (w/o operands... X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=bbc769fbf042f3ce90bbf4fa86b3a275ffc6759d;p=llvm small fixup which enables the issuing of the aforementioned instruction (w/o operands), on MS/Intel syntax. Differential Revision: https://reviews.llvm.org/D26913 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287548 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 95661f0b1b0..d01e33f3f76 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -2536,7 +2536,7 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name, (Name == "smov" || Name == "smovb" || Name == "smovw" || Name == "smovl" || Name == "smovd" || Name == "smovq"))) && (Operands.size() == 1 || Operands.size() == 3)) { - if (Name == "movsd" && Operands.size() == 1) + if (Name == "movsd" && Operands.size() == 1 && !isParsingIntelSyntax()) Operands.back() = X86Operand::CreateToken("movsl", NameLoc); AddDefaultSrcDestOperands(TmpOperands, DefaultMemSIOperand(NameLoc), DefaultMemDIOperand(NameLoc)); diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 795893673f8..e5b1f9f995f 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -77,6 +77,8 @@ _main: vpgatherdd XMM10, XMMWORD PTR [R15 + 2*XMM9], XMM8 // CHECK: movsd -8, %xmm5 movsd XMM5, QWORD PTR [-8] +// CHECK: movsl (%rsi), %es:(%rdi) + movsd // CHECK: movl %ecx, (%eax) mov [eax], ecx // CHECK: movl %ecx, (,%ebx,4)