From: Guillaume Chatelet Date: Fri, 6 Sep 2019 12:48:34 +0000 (+0000) Subject: [Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=bb5df4415570ec1b8158c48a98481d2fc1955ea9;p=llvm [Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: jyknight, sdardis, nemanjai, javed.absar, hiraditya, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, s.egerton, pzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67229 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371200 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/TargetLowering.h b/include/llvm/CodeGen/TargetLowering.h index 6ff51eee5ff..a8a44095049 100644 --- a/include/llvm/CodeGen/TargetLowering.h +++ b/include/llvm/CodeGen/TargetLowering.h @@ -2104,9 +2104,9 @@ protected: TargetDAGCombineArray[NT >> 3] |= 1 << (NT&7); } - /// Set the target's minimum function alignment (in log2(bytes)) - void setMinFunctionLogAlignment(unsigned LogAlign) { - MinFunctionAlignment = llvm::Align(1ULL << LogAlign); + /// Set the target's minimum function alignment. + void setMinFunctionAlignment(llvm::Align Align) { + MinFunctionAlignment = Align; } /// Set the target's preferred function alignment. This should be set if diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 9eb7047cc6b..d16fffd4bc4 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -640,7 +640,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM, EnableExtLdPromotion = true; // Set required alignment. - setMinFunctionLogAlignment(2); + setMinFunctionAlignment(llvm::Align(4)); // Set preferred alignments. setPrefFunctionLogAlignment(STI.getPrefFunctionLogAlignment()); setPrefLoopLogAlignment(STI.getPrefLoopLogAlignment()); diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 8051c1083c8..5c298e52388 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1421,7 +1421,8 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM, setPrefLoopLogAlignment(Subtarget->getPrefLoopLogAlignment()); - setMinFunctionLogAlignment(Subtarget->isThumb() ? 1 : 2); + setMinFunctionAlignment(Subtarget->isThumb() ? llvm::Align(2) + : llvm::Align(4)); if (Subtarget->isThumb() || Subtarget->isThumb2()) setTargetDAGCombine(ISD::ABS); diff --git a/lib/Target/BPF/BPFISelLowering.cpp b/lib/Target/BPF/BPFISelLowering.cpp index 4521c6de4ee..70e0acfa8b5 100644 --- a/lib/Target/BPF/BPFISelLowering.cpp +++ b/lib/Target/BPF/BPFISelLowering.cpp @@ -133,7 +133,7 @@ BPFTargetLowering::BPFTargetLowering(const TargetMachine &TM, setBooleanContents(ZeroOrOneBooleanContent); // Function alignments (log2) - setMinFunctionLogAlignment(3); + setMinFunctionAlignment(llvm::Align(8)); setPrefFunctionLogAlignment(3); if (BPFExpandMemcpyInOrder) { diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp index 9fa7cead193..63f2899d23c 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -1237,7 +1237,7 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM, setPrefLoopLogAlignment(4); setPrefFunctionLogAlignment(4); - setMinFunctionLogAlignment(2); + setMinFunctionAlignment(llvm::Align(4)); setStackPointerRegisterToSaveRestore(HRI.getStackRegister()); setBooleanContents(TargetLoweringBase::UndefinedBooleanContent); setBooleanVectorContents(TargetLoweringBase::UndefinedBooleanContent); diff --git a/lib/Target/Lanai/LanaiISelLowering.cpp b/lib/Target/Lanai/LanaiISelLowering.cpp index 4a2f6dac6e3..4b968531069 100644 --- a/lib/Target/Lanai/LanaiISelLowering.cpp +++ b/lib/Target/Lanai/LanaiISelLowering.cpp @@ -145,7 +145,7 @@ LanaiTargetLowering::LanaiTargetLowering(const TargetMachine &TM, setTargetDAGCombine(ISD::XOR); // Function alignments (log2) - setMinFunctionLogAlignment(2); + setMinFunctionAlignment(llvm::Align(4)); setPrefFunctionLogAlignment(2); setJumpIsExpensive(true); diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 2701ca57cfd..2d0c6197d9f 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -327,7 +327,7 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM, setLibcallCallingConv(RTLIB::OGT_F64, CallingConv::MSP430_BUILTIN); // TODO: __mspabi_srall, __mspabi_srlll, __mspabi_sllll - setMinFunctionLogAlignment(1); + setMinFunctionAlignment(llvm::Align(2)); setPrefFunctionLogAlignment(1); } diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index c1df9a63b40..9e7f9941199 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -518,7 +518,8 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM, setLibcallName(RTLIB::SRA_I128, nullptr); } - setMinFunctionLogAlignment(Subtarget.isGP64bit() ? 3 : 2); + setMinFunctionAlignment(Subtarget.isGP64bit() ? llvm::Align(8) + : llvm::Align(4)); // The arguments on the stack are defined in terms of 4-byte slots on O32 // and 8-byte slots on N32/N64. diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index c7fc7d87ad4..7d51b6c89d8 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1180,7 +1180,7 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, setJumpIsExpensive(); } - setMinFunctionLogAlignment(2); + setMinFunctionAlignment(llvm::Align(4)); if (Subtarget.isDarwin()) setPrefFunctionLogAlignment(4); diff --git a/lib/Target/RISCV/RISCVISelLowering.cpp b/lib/Target/RISCV/RISCVISelLowering.cpp index 8bf291f8d86..ceb931dcf46 100644 --- a/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/lib/Target/RISCV/RISCVISelLowering.cpp @@ -198,9 +198,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, setBooleanContents(ZeroOrOneBooleanContent); // Function alignments (log2). - unsigned FunctionAlignment = Subtarget.hasStdExtC() ? 1 : 2; - setMinFunctionLogAlignment(FunctionAlignment); - setPrefFunctionLogAlignment(FunctionAlignment); + const llvm::Align FunctionAlignment(Subtarget.hasStdExtC() ? 2 : 4); + setMinFunctionAlignment(FunctionAlignment); + setPrefFunctionLogAlignment(Log2(FunctionAlignment)); // Effectively disable jump table generation. setMinimumJumpTableEntries(INT_MAX); diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index cfd6a72d364..660c5298d37 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -1805,7 +1805,7 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); - setMinFunctionLogAlignment(2); + setMinFunctionAlignment(llvm::Align(4)); computeRegisterProperties(Subtarget->getRegisterInfo()); } diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index bc0ebe6f301..5fd4252599c 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -120,7 +120,7 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM, setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); // Instructions are strings of 2-byte aligned 2-byte values. - setMinFunctionLogAlignment(2); + setMinFunctionAlignment(llvm::Align(4)); // For performance reasons we prefer 16-byte alignment. setPrefFunctionLogAlignment(4); diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index 924744343eb..88cf9f7d69c 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -171,7 +171,7 @@ XCoreTargetLowering::XCoreTargetLowering(const TargetMachine &TM, setTargetDAGCombine(ISD::INTRINSIC_VOID); setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); - setMinFunctionLogAlignment(1); + setMinFunctionAlignment(llvm::Align(2)); setPrefFunctionLogAlignment(2); }