From: Luis Marques <luismarques@lowrisc.org>
Date: Tue, 16 Apr 2019 15:09:18 +0000 (+0000)
Subject: [DAGCombiner] Add missing flag to addressing mode check
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=b980346e406bde15efbc9645b1b878bced1bcd6b;p=llvm

[DAGCombiner] Add missing flag to addressing mode check

The checks in `canFoldInAddressingMode` tested for addressing modes that have a
base register but didn't set the `HasBaseReg` flag to true (it's false by
default). This patch fixes that. Although the omission of the flag was
technically incorrect it had no known observable impact, so no tests were
changed by this patch.

Differential Revision:  https://reviews.llvm.org/D60314


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358502 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 9dc33aa3979..b03c65ccf2c 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12897,6 +12897,7 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
 
   TargetLowering::AddrMode AM;
   if (N->getOpcode() == ISD::ADD) {
+    AM.HasBaseReg = true;
     ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
     if (Offset)
       // [reg +/- imm]
@@ -12905,6 +12906,7 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
       // [reg +/- reg]
       AM.Scale = 1;
   } else if (N->getOpcode() == ISD::SUB) {
+    AM.HasBaseReg = true;
     ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
     if (Offset)
       // [reg +/- imm]