From: Devang Patel Date: Tue, 11 Dec 2007 01:23:33 +0000 (+0000) Subject: Separate access field number is not required. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=b8b1e28964efbbf718b3bdd8331985f58d86382a;p=clang Separate access field number is not required. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@44833 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/CodeGen/CodeGenTypes.cpp b/CodeGen/CodeGenTypes.cpp index 21046e9c70..b792d6cfa6 100644 --- a/CodeGen/CodeGenTypes.cpp +++ b/CodeGen/CodeGenTypes.cpp @@ -373,13 +373,12 @@ unsigned CodeGenTypes::getLLVMFieldNo(const FieldDecl *FD) { /// addFieldInfo - Assign field number to field FD. void CodeGenTypes::addFieldInfo(const FieldDecl *FD, unsigned No, - unsigned Begin, unsigned End, - unsigned AccessNo) { + unsigned Begin, unsigned End) { if (Begin == 0 && End == 0) FieldInfo[FD] = No; else // FD is a bit field - BitFields.insert(std::make_pair(FD, BitFieldInfo(No, Begin, End, AccessNo))); + BitFields.insert(std::make_pair(FD, BitFieldInfo(No, Begin, End))); } /// getCGRecordLayout - Return record layout info for the given llvm::Type. @@ -457,7 +456,7 @@ void RecordOrganizer::layoutStructFields(const ASTRecordLayout &RL) { unsigned FieldBegin = Cursor - (O % TySize); unsigned FieldEnd = TySize - (FieldBegin + BitFieldSize); Cursor += BitFieldSize; - CGT.addFieldInfo(FD, FieldNo, FieldBegin, FieldEnd, i); + CGT.addFieldInfo(FD, i, FieldBegin, FieldEnd); } } assert(FoundPrevField && @@ -467,8 +466,7 @@ void RecordOrganizer::layoutStructFields(const ASTRecordLayout &RL) { } else if (ExtraBits >= BitFieldSize) { // Reuse existing llvm field ExtraBits = ExtraBits - BitFieldSize; - CGT.addFieldInfo(FD, FieldNo, Cursor - CurrentFieldStart, - ExtraBits, FieldNo); + CGT.addFieldInfo(FD, FieldNo, Cursor - CurrentFieldStart, ExtraBits); Cursor = Cursor + BitFieldSize; ++FieldNo; } else { @@ -534,7 +532,7 @@ void RecordOrganizer::addLLVMField(const llvm::Type *Ty, uint64_t Size, Cursor += Size; LLVMFields.push_back(Ty); if (FD) - CGT.addFieldInfo(FD, FieldNo, Begin, End, FieldNo); + CGT.addFieldInfo(FD, FieldNo, Begin, End); ++FieldNo; } @@ -546,7 +544,7 @@ void RecordOrganizer::layoutUnionFields() { unsigned PrimaryEltNo = 0; std::pair PrimaryElt = CGT.getContext().getTypeInfo(FieldDecls[0]->getType(), SourceLocation()); - CGT.addFieldInfo(FieldDecls[0], 0, 0, 0, 0); + CGT.addFieldInfo(FieldDecls[0], 0, 0, 0); unsigned Size = FieldDecls.size(); for(unsigned i = 1; i != Size; ++i) { @@ -564,7 +562,7 @@ void RecordOrganizer::layoutUnionFields() { } // In union, each field gets first slot. - CGT.addFieldInfo(FD, 0, 0, 0, 0); + CGT.addFieldInfo(FD, 0, 0, 0); } std::vector Fields; diff --git a/CodeGen/CodeGenTypes.h b/CodeGen/CodeGenTypes.h index a5b540188f..2a06d137dc 100644 --- a/CodeGen/CodeGenTypes.h +++ b/CodeGen/CodeGenTypes.h @@ -78,19 +78,18 @@ class CodeGenTypes { class BitFieldInfo { public: - explicit BitFieldInfo(unsigned N, unsigned B, unsigned E, unsigned A) - : No(N), Begin(B), End(E), AccessFieldNo(A) {} + explicit BitFieldInfo(unsigned N, unsigned B, unsigned E) + : No(N), Begin(B), End(E) {} private: - // No - Field number in llvm struct. + // No - llvm struct field number that is used to + // access this field. It may be not same as struct field number. + // For example, + // struct S { char a; short b:2; } + // Here field 'b' is second field however it is accessed as + // 9th and 10th bitfield of first field whose type is short. unsigned No; unsigned Begin; unsigned End; - // AccessFieldNo - llvm struct field number that is used to - // access this field. It may be not same as No. For example, - // struct S { char a; short b:2; } - // Here field 'b' is second field however it is accessed as - // 9th and 10th bitfield of first field whose type is short. - unsigned AccessFieldNo; }; llvm::DenseMap BitFields; @@ -132,7 +131,7 @@ public: /// addFieldInfo - Assign field number to field FD. void addFieldInfo(const FieldDecl *FD, unsigned No, unsigned Begin, - unsigned End, unsigned AccessNo); + unsigned End); }; } // end namespace CodeGen