From: Sanjay Patel <spatel@rotateright.com>
Date: Wed, 1 Mar 2017 14:46:59 +0000 (+0000)
Subject: [x86] auto-generate checks; NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=b87c498ab7975d9203ebed33bf169ef3f762aa0d;p=llvm

[x86] auto-generate checks; NFC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296629 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
index ab9715d2237..cffefc2bee6 100644
--- a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
+++ b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
@@ -1,36 +1,56 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
 ; PR7814
 
-@g_16 = global i64 -3738643449681751625, align 8  ; <i64*> [#uses=1]
-@g_38 = global i32 0, align 4                     ; <i32*> [#uses=2]
-@.str = private constant [4 x i8] c"%d\0A\00"     ; <[4 x i8]*> [#uses=1]
+@g_16 = global i64 -3738643449681751625, align 8
+@g_38 = global i32 0, align 4
+@.str = private constant [4 x i8] c"%d\0A\00"
 
 define i32 @main() nounwind {
+; CHECK-LABEL: main:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq {{.*}}(%rip), %rax
+; CHECK-NEXT:    sbbl %eax, %eax
+; CHECK-NEXT:    andl $150, %eax
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    jle .LBB0_1
+; CHECK-NEXT:  # BB#2: # %if.then
+; CHECK-NEXT:    movl $1, {{.*}}(%rip)
+; CHECK-NEXT:    movl $1, %esi
+; CHECK-NEXT:    jmp .LBB0_3
+; CHECK-NEXT:  .LBB0_1: # %entry.if.end_crit_edge
+; CHECK-NEXT:    movl {{.*}}(%rip), %esi
+; CHECK-NEXT:  .LBB0_3: # %if.end
+; CHECK-NEXT:    pushq %rax
+; CHECK-NEXT:    movl $.L.str, %edi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    callq printf
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    popq %rcx
+; CHECK-NEXT:    retq
 entry:
-  %tmp = load i64, i64* @g_16                          ; <i64> [#uses=1]
-  %not.lnot = icmp ne i64 %tmp, 0                 ; <i1> [#uses=1]
-  %conv = sext i1 %not.lnot to i64                ; <i64> [#uses=1]
-  %and = and i64 %conv, 150                       ; <i64> [#uses=1]
-  %conv.i = trunc i64 %and to i8                  ; <i8> [#uses=1]
-  %cmp = icmp sgt i8 %conv.i, 0                   ; <i1> [#uses=1]
+  %tmp = load i64, i64* @g_16
+  %not.lnot = icmp ne i64 %tmp, 0
+  %conv = sext i1 %not.lnot to i64
+  %and = and i64 %conv, 150
+  %conv.i = trunc i64 %and to i8
+  %cmp = icmp sgt i8 %conv.i, 0
   br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
 
-; CHECK: andl	$150
-; CHECK-NEXT: testb
-; CHECK-NEXT: jle
-
-entry.if.end_crit_edge:                           ; preds = %entry
-  %tmp4.pre = load i32, i32* @g_38                     ; <i32> [#uses=1]
+entry.if.end_crit_edge:
+  %tmp4.pre = load i32, i32* @g_38
   br label %if.end
 
-if.then:                                          ; preds = %entry
+if.then:
   store i32 1, i32* @g_38
   br label %if.end
 
-if.end:                                           ; preds = %entry.if.end_crit_edge, %if.then
+if.end:
   %tmp4 = phi i32 [ %tmp4.pre, %entry.if.end_crit_edge ], [ 1, %if.then ] ; <i32> [#uses=1]
   %call5 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %tmp4) nounwind ; <i32> [#uses=0]
   ret i32 0
 }
 
 declare i32 @printf(i8* nocapture, ...) nounwind
+