From: Sanjay Patel Date: Tue, 21 Jun 2016 20:22:55 +0000 (+0000) Subject: [x86] AVX FP compare builtins should require AVX target feature (PR28112) X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=b5cd4b6f27be10fa3ba22c0e0d0fd06e7838926b;p=clang [x86] AVX FP compare builtins should require AVX target feature (PR28112) This is a fix for PR28112: https://llvm.org/bugs/show_bug.cgi?id=28112 The FP comparison intrinsics that take an immediate parameter (rather than specifying a comparison predicate in the function name) were added with AVX; these are macros in avxintrin.h. This patch makes clang behavior match gcc (error if a program tries to use these without -mavx) and matches the Intel documentation, eg: VCMPPS: m128 _mm_cmp_ps(m128 a, __m128 b, const int imm) 'V' means this is intended to only work with the AVX form of the instruction. Differential Revision: http://reviews.llvm.org/D21306 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@273311 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def index ab13c56d1f..6b52591cab 100644 --- a/include/clang/Basic/BuiltinsX86.def +++ b/include/clang/Basic/BuiltinsX86.def @@ -219,7 +219,6 @@ TARGET_BUILTIN(__builtin_ia32_ucomisdgt, "iV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_ucomisdge, "iV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_ucomisdneq, "iV2dV2d", "", "sse2") -TARGET_BUILTIN(__builtin_ia32_cmpps, "V4fV4fV4fIc", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpeqps, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpltps, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpleps, "V4fV4fV4f", "", "sse") @@ -228,7 +227,6 @@ TARGET_BUILTIN(__builtin_ia32_cmpneqps, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpnltps, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpnleps, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpordps, "V4fV4fV4f", "", "sse") -TARGET_BUILTIN(__builtin_ia32_cmpss, "V4fV4fV4fIc", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpeqss, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpltss, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_cmpless, "V4fV4fV4f", "", "sse") @@ -242,7 +240,6 @@ TARGET_BUILTIN(__builtin_ia32_maxps, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_minss, "V4fV4fV4f", "", "sse") TARGET_BUILTIN(__builtin_ia32_maxss, "V4fV4fV4f", "", "sse") -TARGET_BUILTIN(__builtin_ia32_cmppd, "V2dV2dV2dIc", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmpeqpd, "V2dV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmpltpd, "V2dV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmplepd, "V2dV2dV2d", "", "sse2") @@ -251,7 +248,6 @@ TARGET_BUILTIN(__builtin_ia32_cmpneqpd, "V2dV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmpnltpd, "V2dV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmpnlepd, "V2dV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmpordpd, "V2dV2dV2d", "", "sse2") -TARGET_BUILTIN(__builtin_ia32_cmpsd, "V2dV2dV2dIc", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmpeqsd, "V2dV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmpltsd, "V2dV2dV2d", "", "sse2") TARGET_BUILTIN(__builtin_ia32_cmplesd, "V2dV2dV2d", "", "sse2") @@ -453,8 +449,12 @@ TARGET_BUILTIN(__builtin_ia32_vpermilvarps256, "V8fV8fV8i", "", "avx") TARGET_BUILTIN(__builtin_ia32_blendvpd256, "V4dV4dV4dV4d", "", "avx") TARGET_BUILTIN(__builtin_ia32_blendvps256, "V8fV8fV8fV8f", "", "avx") TARGET_BUILTIN(__builtin_ia32_dpps256, "V8fV8fV8fIc", "", "avx") +TARGET_BUILTIN(__builtin_ia32_cmppd, "V2dV2dV2dIc", "", "avx") TARGET_BUILTIN(__builtin_ia32_cmppd256, "V4dV4dV4dIc", "", "avx") +TARGET_BUILTIN(__builtin_ia32_cmpps, "V4fV4fV4fIc", "", "avx") TARGET_BUILTIN(__builtin_ia32_cmpps256, "V8fV8fV8fIc", "", "avx") +TARGET_BUILTIN(__builtin_ia32_cmpsd, "V2dV2dV2dIc", "", "avx") +TARGET_BUILTIN(__builtin_ia32_cmpss, "V4fV4fV4fIc", "", "avx") TARGET_BUILTIN(__builtin_ia32_cvtdq2ps256, "V8fV8i", "", "avx") TARGET_BUILTIN(__builtin_ia32_cvtpd2ps256, "V4fV4d", "", "avx") TARGET_BUILTIN(__builtin_ia32_cvtps2dq256, "V8iV8f", "", "avx") diff --git a/test/CodeGen/target-features-error-2.c b/test/CodeGen/target-features-error-2.c index c23d152dcf..683d9ab99e 100644 --- a/test/CodeGen/target-features-error-2.c +++ b/test/CodeGen/target-features-error-2.c @@ -1,7 +1,38 @@ -// RUN: %clang_cc1 %s -triple=x86_64-linux-gnu -S -verify -o - +// RUN: %clang_cc1 %s -triple=x86_64-linux-gnu -S -verify -o - -D NEED_SSE42 +// RUN: %clang_cc1 %s -triple=x86_64-linux-gnu -S -verify -o - -D NEED_AVX_1 +// RUN: %clang_cc1 %s -triple=x86_64-linux-gnu -S -verify -o - -D NEED_AVX_2 +// RUN: %clang_cc1 %s -triple=x86_64-linux-gnu -S -verify -o - -D NEED_AVX_3 +// RUN: %clang_cc1 %s -triple=x86_64-linux-gnu -S -verify -o - -D NEED_AVX_4 + #define __MM_MALLOC_H #include +#if NEED_SSE42 int baz(__m256i a) { return _mm256_extract_epi32(a, 3); // expected-error {{always_inline function '_mm256_extract_epi32' requires target feature 'sse4.2', but would be inlined into function 'baz' that is compiled without support for 'sse4.2'}} } +#endif + +#if NEED_AVX_1 +__m128 need_avx(__m128 a, __m128 b) { + return _mm_cmp_ps(a, b, 0); // expected-error {{'__builtin_ia32_cmpps' needs target feature avx}} +} +#endif + +#if NEED_AVX_2 +__m128 need_avx(__m128 a, __m128 b) { + return _mm_cmp_ss(a, b, 0); // expected-error {{'__builtin_ia32_cmpss' needs target feature avx}} +} +#endif + +#if NEED_AVX_3 +__m128d need_avx(__m128d a, __m128d b) { + return _mm_cmp_pd(a, b, 0); // expected-error {{'__builtin_ia32_cmppd' needs target feature avx}} +} +#endif + +#if NEED_AVX_4 +__m128d need_avx(__m128d a, __m128d b) { + return _mm_cmp_sd(a, b, 0); // expected-error {{'__builtin_ia32_cmpsd' needs target feature avx}} +} +#endif