From: Ana Pazos <apazos@codeaurora.org>
Date: Thu, 24 Jan 2019 02:31:23 +0000 (+0000)
Subject: [RISCV] Set isReMaterializable for ORI, XORI
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=afd226c729959d2fc0a9104f0b7e049e5eed044e;p=llvm

[RISCV] Set isReMaterializable for ORI, XORI

Reviewers: asb

Reviewed By: asb

Subscribers: asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei

Differential Revision: https://reviews.llvm.org/D57069

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352008 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/RISCV/RISCVInstrInfo.td b/lib/Target/RISCV/RISCVInstrInfo.td
index 787ddf16952..3ba86cfcdfd 100644
--- a/lib/Target/RISCV/RISCVInstrInfo.td
+++ b/lib/Target/RISCV/RISCVInstrInfo.td
@@ -353,8 +353,12 @@ def ADDI  : ALU_ri<0b000, "addi">;
 
 def SLTI  : ALU_ri<0b010, "slti">;
 def SLTIU : ALU_ri<0b011, "sltiu">;
+
+let isReMaterializable = 1 in {
 def XORI  : ALU_ri<0b100, "xori">;
 def ORI   : ALU_ri<0b110, "ori">;
+}
+
 def ANDI  : ALU_ri<0b111, "andi">;
 
 def SLLI : Shift_ri<0, 0b001, "slli">;