From: Craig Topper <craig.topper@intel.com>
Date: Sat, 6 Apr 2019 18:00:41 +0000 (+0000)
Subject: [X86] Autogenerate complete checks. NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=af98c632ded8b55023f4f8560521509c7e6e8a98;p=llvm

[X86] Autogenerate complete checks. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357844 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/fold-and-shift.ll b/test/CodeGen/X86/fold-and-shift.ll
index 5de4acf1019..a434c1f9c1d 100644
--- a/test/CodeGen/X86/fold-and-shift.ll
+++ b/test/CodeGen/X86/fold-and-shift.ll
@@ -1,11 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-- | FileCheck %s
 
 define i32 @t1(i8* %X, i32 %i) {
 ; CHECK-LABEL: t1:
-; CHECK-NOT: and
-; CHECK: movzbl
-; CHECK: movl (%{{...}},%{{...}},4),
-; CHECK: ret
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movzbl %cl, %ecx
+; CHECK-NEXT:    movl (%eax,%ecx,4), %eax
+; CHECK-NEXT:    retl
 
 entry:
   %tmp2 = shl i32 %i, 2
@@ -18,10 +21,12 @@ entry:
 
 define i32 @t2(i16* %X, i32 %i) {
 ; CHECK-LABEL: t2:
-; CHECK-NOT: and
-; CHECK: movzwl
-; CHECK: movl (%{{...}},%{{...}},4),
-; CHECK: ret
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movzwl %cx, %ecx
+; CHECK-NEXT:    movl (%eax,%ecx,4), %eax
+; CHECK-NEXT:    retl
 
 entry:
   %tmp2 = shl i32 %i, 1
@@ -40,10 +45,14 @@ define i32 @t3(i16* %i.ptr, i32* %arr) {
 ; the function, the DAG can get confusing trying to re-use both of them and
 ; prevent easy analysis of the mask in order to match this.
 ; CHECK-LABEL: t3:
-; CHECK-NOT: and
-; CHECK: shrl
-; CHECK: addl (%{{...}},%{{...}},4),
-; CHECK: ret
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movzwl (%eax), %eax
+; CHECK-NEXT:    movl %eax, %edx
+; CHECK-NEXT:    shrl $11, %edx
+; CHECK-NEXT:    addl (%ecx,%edx,4), %eax
+; CHECK-NEXT:    retl
 
 entry:
   %i = load i16, i16* %i.ptr
@@ -59,10 +68,15 @@ define i32 @t4(i16* %i.ptr, i32* %arr) {
 ; A version of @t3 that has more zero extends and more re-use of intermediate
 ; values. This exercise slightly different bits of canonicalization.
 ; CHECK-LABEL: t4:
-; CHECK-NOT: and
-; CHECK: shrl
-; CHECK: addl (%{{...}},%{{...}},4),
-; CHECK: ret
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movzwl (%eax), %eax
+; CHECK-NEXT:    movl %eax, %edx
+; CHECK-NEXT:    shrl $11, %edx
+; CHECK-NEXT:    addl (%ecx,%edx,4), %eax
+; CHECK-NEXT:    addl %edx, %eax
+; CHECK-NEXT:    retl
 
 entry:
   %i = load i16, i16* %i.ptr