From: Roman Lebedev Date: Mon, 16 Sep 2019 18:28:22 +0000 (+0000) Subject: [ARM][Codegen] Autogenerate arm-cgp-casts.ll test. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=ae054dc43450d1dd9f158b5a9104f5f694b0f045;p=llvm [ARM][Codegen] Autogenerate arm-cgp-casts.ll test. Apparently it got broken by r372009 while i thought it was r372012. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372019 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/ARM/CGP/arm-cgp-casts.ll b/test/CodeGen/ARM/CGP/arm-cgp-casts.ll index e269aacad28..538f110ffd7 100644 --- a/test/CodeGen/ARM/CGP/arm-cgp-casts.ll +++ b/test/CodeGen/ARM/CGP/arm-cgp-casts.ll @@ -1,24 +1,68 @@ -; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NODSP -; RUN: llc -mtriple=thumbv7-linux-android %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NODSP +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NODSP --check-prefix=CHECK-NODSP-V8 +; RUN: llc -mtriple=thumbv7-linux-android %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NODSP --check-prefix=CHECK-NODSP-V7 ; RUN: llc -mtriple=thumbv7em -mcpu=cortex-m7 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DSP ; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DSP-IMM ; Transform will fail because the trunc is not a sink. -; CHECK-LABEL: dsp_trunc -; CHECK: add [[ADD:[^ ]+]], -; CHECK-DSP-NEXT: ldrh r1, [r3] -; CHECK-DSP-NEXT: ldrh r2, [r2] -; CHECK-DSP-NEXT: subs r1, r1, [[ADD]] -; CHECK-DSP-NEXT: add r0, r2 -; CHECK-DSP-NEXT: uxth r3, r1 -; CHECK-DSP-NEXT: uxth r2, r0 -; CHECK-DSP-NEXT: cmp r2, r3 - -; CHECK-DSP-IMM: usub16 -; CHECK-DSP-IMM: usub16 -; CHECK-DSP-IMM: uadd16 -; CHECK-DSP-IMM: cmp + define i16 @dsp_trunc(i32 %arg0, i32 %arg1, i16* %gep0, i16* %gep1) { +; CHECK-NODSP-V8-LABEL: dsp_trunc: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: add r1, r0 +; CHECK-NODSP-V8-NEXT: ldrh r0, [r2] +; CHECK-NODSP-V8-NEXT: ldrh r2, [r3] +; CHECK-NODSP-V8-NEXT: add r0, r1 +; CHECK-NODSP-V8-NEXT: subs r1, r2, r1 +; CHECK-NODSP-V8-NEXT: uxth r3, r0 +; CHECK-NODSP-V8-NEXT: uxth r2, r1 +; CHECK-NODSP-V8-NEXT: cmp r3, r2 +; CHECK-NODSP-V8-NEXT: it lo +; CHECK-NODSP-V8-NEXT: movlo r0, r1 +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: dsp_trunc: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrh r2, [r2] +; CHECK-NODSP-V7-NEXT: add r1, r0 +; CHECK-NODSP-V7-NEXT: ldrh r3, [r3] +; CHECK-NODSP-V7-NEXT: adds r0, r2, r1 +; CHECK-NODSP-V7-NEXT: subs r1, r3, r1 +; CHECK-NODSP-V7-NEXT: uxth r3, r0 +; CHECK-NODSP-V7-NEXT: uxth r2, r1 +; CHECK-NODSP-V7-NEXT: cmp r3, r2 +; CHECK-NODSP-V7-NEXT: it lo +; CHECK-NODSP-V7-NEXT: movlo r0, r1 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: dsp_trunc: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: add r0, r1 +; CHECK-DSP-NEXT: ldrh r1, [r3] +; CHECK-DSP-NEXT: ldrh r2, [r2] +; CHECK-DSP-NEXT: subs r1, r1, r0 +; CHECK-DSP-NEXT: add r0, r2 +; CHECK-DSP-NEXT: uxth r3, r1 +; CHECK-DSP-NEXT: uxth r2, r0 +; CHECK-DSP-NEXT: cmp r2, r3 +; CHECK-DSP-NEXT: it lo +; CHECK-DSP-NEXT: movlo r0, r1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: dsp_trunc: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: add r0, r1 +; CHECK-DSP-IMM-NEXT: movs r1, #0 +; CHECK-DSP-IMM-NEXT: uxth r0, r0 +; CHECK-DSP-IMM-NEXT: usub16 r1, r1, r0 +; CHECK-DSP-IMM-NEXT: ldrh r0, [r2] +; CHECK-DSP-IMM-NEXT: ldrh r3, [r3] +; CHECK-DSP-IMM-NEXT: usub16 r0, r0, r1 +; CHECK-DSP-IMM-NEXT: uadd16 r1, r3, r1 +; CHECK-DSP-IMM-NEXT: cmp r0, r1 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r1 +; CHECK-DSP-IMM-NEXT: bx lr entry: %add0 = add i32 %arg0, %arg1 %conv0 = trunc i32 %add0 to i16 @@ -32,11 +76,16 @@ entry: ret i16 %res } -; CHECK-LABEL: trunc_i16_i8 -; CHECK: ldrh -; CHECK: uxtb -; CHECK: cmp define i8 @trunc_i16_i8(i16* %ptr, i16 zeroext %arg0, i8 zeroext %arg1) { +; CHECK-LABEL: trunc_i16_i8: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: ldrh r0, [r0] +; CHECK-NEXT: add r0, r1 +; CHECK-NEXT: uxtb r0, r0 +; CHECK-NEXT: cmp r0, r2 +; CHECK-NEXT: it ls +; CHECK-NEXT: movls r0, r2 +; CHECK-NEXT: bx lr entry: %0 = load i16, i16* %ptr %1 = add i16 %0, %arg0 @@ -48,11 +97,70 @@ entry: ; The pass perform the transform, but a uxtb will still be inserted to handle ; the zext to the icmp. -; CHECK-LABEL: icmp_i32_zext: -; CHECK: sub -; CHECK: uxtb -; CHECK: cmp define i8 @icmp_i32_zext(i8* %ptr) { +; CHECK-NODSP-V8-LABEL: icmp_i32_zext: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldrb r2, [r0], #1 +; CHECK-NODSP-V8-NEXT: subs r1, r2, #1 +; CHECK-NODSP-V8-NEXT: .p2align 2 +; CHECK-NODSP-V8-NEXT: .LBB2_1: @ %body +; CHECK-NODSP-V8-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NODSP-V8-NEXT: uxtb r3, r1 +; CHECK-NODSP-V8-NEXT: cmp r2, r3 +; CHECK-NODSP-V8-NEXT: itt ne +; CHECK-NODSP-V8-NEXT: movne r0, r1 +; CHECK-NODSP-V8-NEXT: bxne lr +; CHECK-NODSP-V8-NEXT: ldrb r1, [r0, r2] +; CHECK-NODSP-V8-NEXT: adds r2, #1 +; CHECK-NODSP-V8-NEXT: b .LBB2_1 +; +; CHECK-NODSP-V7-LABEL: icmp_i32_zext: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrb r2, [r0], #1 +; CHECK-NODSP-V7-NEXT: subs r1, r2, #1 +; CHECK-NODSP-V7-NEXT: .LBB2_1: @ %body +; CHECK-NODSP-V7-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NODSP-V7-NEXT: uxtb r3, r1 +; CHECK-NODSP-V7-NEXT: cmp r2, r3 +; CHECK-NODSP-V7-NEXT: itt ne +; CHECK-NODSP-V7-NEXT: movne r0, r1 +; CHECK-NODSP-V7-NEXT: bxne lr +; CHECK-NODSP-V7-NEXT: ldrb r1, [r0, r2] +; CHECK-NODSP-V7-NEXT: adds r2, #1 +; CHECK-NODSP-V7-NEXT: b .LBB2_1 +; +; CHECK-DSP-LABEL: icmp_i32_zext: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrb r2, [r0], #1 +; CHECK-DSP-NEXT: subs r1, r2, #1 +; CHECK-DSP-NEXT: .LBB2_1: @ %body +; CHECK-DSP-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-DSP-NEXT: uxtb r3, r1 +; CHECK-DSP-NEXT: cmp r2, r3 +; CHECK-DSP-NEXT: itt ne +; CHECK-DSP-NEXT: movne r0, r1 +; CHECK-DSP-NEXT: bxne lr +; CHECK-DSP-NEXT: ldrb r1, [r0, r2] +; CHECK-DSP-NEXT: adds r2, #1 +; CHECK-DSP-NEXT: b .LBB2_1 +; +; CHECK-DSP-IMM-LABEL: icmp_i32_zext: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldrb r2, [r0], #1 +; CHECK-DSP-IMM-NEXT: subs r1, r2, #1 +; CHECK-DSP-IMM-NEXT: .LBB2_1: @ %body +; CHECK-DSP-IMM-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-DSP-IMM-NEXT: uxtb r3, r1 +; CHECK-DSP-IMM-NEXT: cmp r2, r3 +; CHECK-DSP-IMM-NEXT: bne .LBB2_3 +; CHECK-DSP-IMM-NEXT: @ %bb.2: @ %if.end +; CHECK-DSP-IMM-NEXT: @ in Loop: Header=BB2_1 Depth=1 +; CHECK-DSP-IMM-NEXT: ldrb r1, [r0, r2] +; CHECK-DSP-IMM-NEXT: adds r2, #1 +; CHECK-DSP-IMM-NEXT: b .LBB2_1 +; CHECK-DSP-IMM-NEXT: .LBB2_3: @ %exit +; CHECK-DSP-IMM-NEXT: mov r0, r1 +; CHECK-DSP-IMM-NEXT: bx lr entry: %gep = getelementptr inbounds i8, i8* %ptr, i32 0 %0 = load i8, i8* %gep, align 1 @@ -81,10 +189,70 @@ exit: } ; Won't don't handle sext -; CHECK-LABEL: icmp_sext_zext_store_i8_i16 -; CHECK: ldrb -; CHECK: ldrsh define i32 @icmp_sext_zext_store_i8_i16() { +; CHECK-NODSP-V8-LABEL: icmp_sext_zext_store_i8_i16: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: movw r0, :lower16:d_uch +; CHECK-NODSP-V8-NEXT: movt r0, :upper16:d_uch +; CHECK-NODSP-V8-NEXT: ldrb r1, [r0, #2] +; CHECK-NODSP-V8-NEXT: movw r0, :lower16:d_sh +; CHECK-NODSP-V8-NEXT: movt r0, :upper16:d_sh +; CHECK-NODSP-V8-NEXT: ldrsh.w r0, [r0, #4] +; CHECK-NODSP-V8-NEXT: movw r2, :lower16:sh1 +; CHECK-NODSP-V8-NEXT: subs r0, r1, r0 +; CHECK-NODSP-V8-NEXT: clz r0, r0 +; CHECK-NODSP-V8-NEXT: movt r2, :upper16:sh1 +; CHECK-NODSP-V8-NEXT: lsrs r0, r0, #5 +; CHECK-NODSP-V8-NEXT: strh r1, [r2] +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: icmp_sext_zext_store_i8_i16: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: movw r0, :lower16:d_sh +; CHECK-NODSP-V7-NEXT: movw r1, :lower16:d_uch +; CHECK-NODSP-V7-NEXT: movt r0, :upper16:d_sh +; CHECK-NODSP-V7-NEXT: movt r1, :upper16:d_uch +; CHECK-NODSP-V7-NEXT: ldrb r1, [r1, #2] +; CHECK-NODSP-V7-NEXT: movw r2, :lower16:sh1 +; CHECK-NODSP-V7-NEXT: ldrsh.w r0, [r0, #4] +; CHECK-NODSP-V7-NEXT: movt r2, :upper16:sh1 +; CHECK-NODSP-V7-NEXT: strh r1, [r2] +; CHECK-NODSP-V7-NEXT: subs r0, r1, r0 +; CHECK-NODSP-V7-NEXT: clz r0, r0 +; CHECK-NODSP-V7-NEXT: lsrs r0, r0, #5 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: icmp_sext_zext_store_i8_i16: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: movw r0, :lower16:d_uch +; CHECK-DSP-NEXT: movw r1, :lower16:sh1 +; CHECK-DSP-NEXT: movt r0, :upper16:d_uch +; CHECK-DSP-NEXT: movt r1, :upper16:sh1 +; CHECK-DSP-NEXT: ldrb r0, [r0, #2] +; CHECK-DSP-NEXT: strh r0, [r1] +; CHECK-DSP-NEXT: movw r1, :lower16:d_sh +; CHECK-DSP-NEXT: movt r1, :upper16:d_sh +; CHECK-DSP-NEXT: ldrsh.w r1, [r1, #4] +; CHECK-DSP-NEXT: subs r0, r0, r1 +; CHECK-DSP-NEXT: clz r0, r0 +; CHECK-DSP-NEXT: lsrs r0, r0, #5 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: icmp_sext_zext_store_i8_i16: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: movw r0, :lower16:d_sh +; CHECK-DSP-IMM-NEXT: movw r1, :lower16:d_uch +; CHECK-DSP-IMM-NEXT: movt r0, :upper16:d_sh +; CHECK-DSP-IMM-NEXT: movt r1, :upper16:d_uch +; CHECK-DSP-IMM-NEXT: ldrb r1, [r1, #2] +; CHECK-DSP-IMM-NEXT: movw r2, :lower16:sh1 +; CHECK-DSP-IMM-NEXT: ldrsh.w r0, [r0, #4] +; CHECK-DSP-IMM-NEXT: movt r2, :upper16:sh1 +; CHECK-DSP-IMM-NEXT: strh r1, [r2] +; CHECK-DSP-IMM-NEXT: subs r0, r1, r0 +; CHECK-DSP-IMM-NEXT: clz r0, r0 +; CHECK-DSP-IMM-NEXT: lsrs r0, r0, #5 +; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i8, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @d_uch, i32 0, i32 2), align 1 %conv = zext i8 %0 to i16 @@ -97,12 +265,66 @@ entry: ret i32 %conv3 } -; CHECK-LABEL: or_icmp_ugt: -; CHECK: ldrb -; CHECK: subs.w -; CHECK-NOT: uxt -; CHECK: cmp define i1 @or_icmp_ugt(i32 %arg, i8* %ptr) { +; CHECK-NODSP-V8-LABEL: or_icmp_ugt: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldrb r1, [r1] +; CHECK-NODSP-V8-NEXT: adds r2, r1, #3 +; CHECK-NODSP-V8-NEXT: subs.w r0, r0, r2, lsl #1 +; CHECK-NODSP-V8-NEXT: it ne +; CHECK-NODSP-V8-NEXT: movne r0, #1 +; CHECK-NODSP-V8-NEXT: subs r1, #1 +; CHECK-NODSP-V8-NEXT: movs r2, #0 +; CHECK-NODSP-V8-NEXT: cmp r1, #3 +; CHECK-NODSP-V8-NEXT: it hi +; CHECK-NODSP-V8-NEXT: movhi r2, #1 +; CHECK-NODSP-V8-NEXT: orrs r0, r2 +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: or_icmp_ugt: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrb r1, [r1] +; CHECK-NODSP-V7-NEXT: adds r2, r1, #3 +; CHECK-NODSP-V7-NEXT: subs r1, #1 +; CHECK-NODSP-V7-NEXT: subs.w r0, r0, r2, lsl #1 +; CHECK-NODSP-V7-NEXT: mov.w r2, #0 +; CHECK-NODSP-V7-NEXT: it ne +; CHECK-NODSP-V7-NEXT: movne r0, #1 +; CHECK-NODSP-V7-NEXT: cmp r1, #3 +; CHECK-NODSP-V7-NEXT: it hi +; CHECK-NODSP-V7-NEXT: movhi r2, #1 +; CHECK-NODSP-V7-NEXT: orrs r0, r2 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: or_icmp_ugt: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrb r1, [r1] +; CHECK-DSP-NEXT: adds r2, r1, #3 +; CHECK-DSP-NEXT: subs r1, #1 +; CHECK-DSP-NEXT: subs.w r0, r0, r2, lsl #1 +; CHECK-DSP-NEXT: mov.w r2, #0 +; CHECK-DSP-NEXT: it ne +; CHECK-DSP-NEXT: movne r0, #1 +; CHECK-DSP-NEXT: cmp r1, #3 +; CHECK-DSP-NEXT: it hi +; CHECK-DSP-NEXT: movhi r2, #1 +; CHECK-DSP-NEXT: orrs r0, r2 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: or_icmp_ugt: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldrb r1, [r1] +; CHECK-DSP-IMM-NEXT: adds r2, r1, #3 +; CHECK-DSP-IMM-NEXT: subs.w r0, r0, r2, lsl #1 +; CHECK-DSP-IMM-NEXT: it ne +; CHECK-DSP-IMM-NEXT: movne r0, #1 +; CHECK-DSP-IMM-NEXT: subs r1, #1 +; CHECK-DSP-IMM-NEXT: movs r2, #0 +; CHECK-DSP-IMM-NEXT: cmp r1, #3 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r2, #1 +; CHECK-DSP-IMM-NEXT: orrs r0, r2 +; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i8, i8* %ptr %1 = zext i8 %0 to i32 @@ -117,11 +339,117 @@ entry: ; We currently only handle truncs as sinks, so a uxt will still be needed for ; the icmp ugt instruction. -; CHECK-LABEL: urem_trunc_icmps -; CHECK: cmp -; CHECK: uxt -; CHECK: cmp define void @urem_trunc_icmps(i16** %in, i32* %g, i32* %k) { +; CHECK-NODSP-V8-LABEL: urem_trunc_icmps: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldr r0, [r0] +; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V8-NEXT: cbz r0, .LBB5_3 +; CHECK-NODSP-V8-NEXT: @ %bb.1: @ %cond.false.i +; CHECK-NODSP-V8-NEXT: movs r3, #5 +; CHECK-NODSP-V8-NEXT: udiv r3, r3, r0 +; CHECK-NODSP-V8-NEXT: muls r0, r3, r0 +; CHECK-NODSP-V8-NEXT: rsb.w r0, r0, #5 +; CHECK-NODSP-V8-NEXT: .p2align 2 +; CHECK-NODSP-V8-NEXT: .LBB5_2: @ %body +; CHECK-NODSP-V8-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NODSP-V8-NEXT: uxtb r3, r0 +; CHECK-NODSP-V8-NEXT: cmp r3, #7 +; CHECK-NODSP-V8-NEXT: mov.w r3, #0 +; CHECK-NODSP-V8-NEXT: it hi +; CHECK-NODSP-V8-NEXT: movhi r3, #1 +; CHECK-NODSP-V8-NEXT: str r3, [r1] +; CHECK-NODSP-V8-NEXT: ldr r3, [r2] +; CHECK-NODSP-V8-NEXT: cmp r3, #0 +; CHECK-NODSP-V8-NEXT: it ne +; CHECK-NODSP-V8-NEXT: bxne lr +; CHECK-NODSP-V8-NEXT: adds r0, #1 +; CHECK-NODSP-V8-NEXT: b .LBB5_2 +; CHECK-NODSP-V8-NEXT: .LBB5_3: @ %exit +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: urem_trunc_icmps: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: .save {r4, r5, r7, lr} +; CHECK-NODSP-V7-NEXT: push {r4, r5, r7, lr} +; CHECK-NODSP-V7-NEXT: ldr r0, [r0] +; CHECK-NODSP-V7-NEXT: mov r5, r1 +; CHECK-NODSP-V7-NEXT: ldrh r1, [r0] +; CHECK-NODSP-V7-NEXT: cbz r1, .LBB5_4 +; CHECK-NODSP-V7-NEXT: @ %bb.1: @ %cond.false.i +; CHECK-NODSP-V7-NEXT: movs r0, #5 +; CHECK-NODSP-V7-NEXT: mov r4, r2 +; CHECK-NODSP-V7-NEXT: bl __aeabi_uidivmod +; CHECK-NODSP-V7-NEXT: .LBB5_2: @ %body +; CHECK-NODSP-V7-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NODSP-V7-NEXT: uxtb r0, r1 +; CHECK-NODSP-V7-NEXT: cmp r0, #7 +; CHECK-NODSP-V7-NEXT: mov.w r0, #0 +; CHECK-NODSP-V7-NEXT: it hi +; CHECK-NODSP-V7-NEXT: movhi r0, #1 +; CHECK-NODSP-V7-NEXT: str r0, [r5] +; CHECK-NODSP-V7-NEXT: ldr r0, [r4] +; CHECK-NODSP-V7-NEXT: cbnz r0, .LBB5_4 +; CHECK-NODSP-V7-NEXT: @ %bb.3: @ %for.inc +; CHECK-NODSP-V7-NEXT: @ in Loop: Header=BB5_2 Depth=1 +; CHECK-NODSP-V7-NEXT: adds r1, #1 +; CHECK-NODSP-V7-NEXT: b .LBB5_2 +; CHECK-NODSP-V7-NEXT: .LBB5_4: @ %exit +; CHECK-NODSP-V7-NEXT: pop {r4, r5, r7, pc} +; +; CHECK-DSP-LABEL: urem_trunc_icmps: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldr r0, [r0] +; CHECK-DSP-NEXT: ldrh r0, [r0] +; CHECK-DSP-NEXT: cbz r0, .LBB5_3 +; CHECK-DSP-NEXT: @ %bb.1: @ %cond.false.i +; CHECK-DSP-NEXT: movs r3, #5 +; CHECK-DSP-NEXT: udiv r3, r3, r0 +; CHECK-DSP-NEXT: muls r0, r3, r0 +; CHECK-DSP-NEXT: rsb.w r0, r0, #5 +; CHECK-DSP-NEXT: .LBB5_2: @ %body +; CHECK-DSP-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-DSP-NEXT: uxtb r3, r0 +; CHECK-DSP-NEXT: cmp r3, #7 +; CHECK-DSP-NEXT: mov.w r3, #0 +; CHECK-DSP-NEXT: it hi +; CHECK-DSP-NEXT: movhi r3, #1 +; CHECK-DSP-NEXT: str r3, [r1] +; CHECK-DSP-NEXT: ldr r3, [r2] +; CHECK-DSP-NEXT: cmp r3, #0 +; CHECK-DSP-NEXT: it ne +; CHECK-DSP-NEXT: bxne lr +; CHECK-DSP-NEXT: adds r0, #1 +; CHECK-DSP-NEXT: b .LBB5_2 +; CHECK-DSP-NEXT: .LBB5_3: @ %exit +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: urem_trunc_icmps: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldr r0, [r0] +; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] +; CHECK-DSP-IMM-NEXT: cbz r0, .LBB5_4 +; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %cond.false.i +; CHECK-DSP-IMM-NEXT: movs r3, #5 +; CHECK-DSP-IMM-NEXT: udiv r3, r3, r0 +; CHECK-DSP-IMM-NEXT: muls r0, r3, r0 +; CHECK-DSP-IMM-NEXT: rsb.w r0, r0, #5 +; CHECK-DSP-IMM-NEXT: .LBB5_2: @ %body +; CHECK-DSP-IMM-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-DSP-IMM-NEXT: uxtb r3, r0 +; CHECK-DSP-IMM-NEXT: cmp r3, #7 +; CHECK-DSP-IMM-NEXT: mov.w r3, #0 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r3, #1 +; CHECK-DSP-IMM-NEXT: str r3, [r1] +; CHECK-DSP-IMM-NEXT: ldr r3, [r2] +; CHECK-DSP-IMM-NEXT: cbnz r3, .LBB5_4 +; CHECK-DSP-IMM-NEXT: @ %bb.3: @ %for.inc +; CHECK-DSP-IMM-NEXT: @ in Loop: Header=BB5_2 Depth=1 +; CHECK-DSP-IMM-NEXT: adds r0, #1 +; CHECK-DSP-IMM-NEXT: b .LBB5_2 +; CHECK-DSP-IMM-NEXT: .LBB5_4: @ %exit +; CHECK-DSP-IMM-NEXT: bx lr entry: %ptr = load i16*, i16** %in, align 4 %ld = load i16, i16* %ptr, align 2 @@ -152,13 +480,44 @@ exit: ; Check that %exp requires uxth in all cases, and will also be required to ; promote %1 for the call - unless we can generate a uadd16. -; CHECK-LABEL: zext_load_sink_call: -; CHECK: uxt -; CHECK-DSP-IMM: uadd16 -; CHECK: cmp -; CHECK-NODSP: uxt -; CHECK-DSP-IMM-NOT: uxt define i32 @zext_load_sink_call(i16* %ptr, i16 %exp) { +; CHECK-NODSP-LABEL: zext_load_sink_call: +; CHECK-NODSP: @ %bb.0: @ %entry +; CHECK-NODSP-NEXT: ldrh r0, [r0] +; CHECK-NODSP-NEXT: uxth r2, r1 +; CHECK-NODSP-NEXT: cmp r0, r2 +; CHECK-NODSP-NEXT: itt eq +; CHECK-NODSP-NEXT: moveq r0, #0 +; CHECK-NODSP-NEXT: bxeq lr +; CHECK-NODSP-NEXT: adds r1, #3 +; CHECK-NODSP-NEXT: uxth r1, r1 +; CHECK-NODSP-NEXT: b dummy +; +; CHECK-DSP-LABEL: zext_load_sink_call: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrh r0, [r0] +; CHECK-DSP-NEXT: uxth r2, r1 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: itt eq +; CHECK-DSP-NEXT: moveq r0, #0 +; CHECK-DSP-NEXT: bxeq lr +; CHECK-DSP-NEXT: adds r1, #3 +; CHECK-DSP-NEXT: uxth r1, r1 +; CHECK-DSP-NEXT: b dummy +; +; CHECK-DSP-IMM-LABEL: zext_load_sink_call: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: uxth r2, r1 +; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] +; CHECK-DSP-IMM-NEXT: movs r1, #3 +; CHECK-DSP-IMM-NEXT: uadd16 r1, r2, r1 +; CHECK-DSP-IMM-NEXT: cmp r0, r2 +; CHECK-DSP-IMM-NEXT: bne .LBB6_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %exit +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .LBB6_2: @ %if.then +; CHECK-DSP-IMM-NEXT: b dummy entry: %0 = load i16, i16* %ptr, align 4 %1 = add i16 %exp, 3 @@ -176,9 +535,36 @@ exit: ret i32 %exitval } -; CHECK-LABEL: bitcast_i16 -; CHECK-NOT: uxt define i16 @bitcast_i16(i16 zeroext %arg0, i16 zeroext %arg1) { +; CHECK-NODSP-LABEL: bitcast_i16: +; CHECK-NODSP: @ %bb.0: @ %entry +; CHECK-NODSP-NEXT: adds r0, #1 +; CHECK-NODSP-NEXT: movw r2, #12345 +; CHECK-NODSP-NEXT: cmp r0, r2 +; CHECK-NODSP-NEXT: it hi +; CHECK-NODSP-NEXT: movwhi r1, #32657 +; CHECK-NODSP-NEXT: mov r0, r1 +; CHECK-NODSP-NEXT: bx lr +; +; CHECK-DSP-LABEL: bitcast_i16: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: adds r0, #1 +; CHECK-DSP-NEXT: movw r2, #12345 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: it hi +; CHECK-DSP-NEXT: movwhi r1, #32657 +; CHECK-DSP-NEXT: mov r0, r1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: bitcast_i16: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: adds r2, r0, #1 +; CHECK-DSP-IMM-NEXT: movw r0, #32657 +; CHECK-DSP-IMM-NEXT: movw r3, #12345 +; CHECK-DSP-IMM-NEXT: cmp r2, r3 +; CHECK-DSP-IMM-NEXT: it ls +; CHECK-DSP-IMM-NEXT: movls r0, r1 +; CHECK-DSP-IMM-NEXT: bx lr entry: %cast = bitcast i16 12345 to i16 %add = add nuw i16 %arg0, 1 @@ -187,9 +573,15 @@ entry: ret i16 %res } -; CHECK-LABEL: bitcast_i8 -; CHECK-NOT: uxt define i8 @bitcast_i8(i8 zeroext %arg0, i8 zeroext %arg1) { +; CHECK-LABEL: bitcast_i8: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: mvn r2, #127 +; CHECK-NEXT: cmp.w r1, r0, lsl #1 +; CHECK-NEXT: it ls +; CHECK-NEXT: movls r2, #127 +; CHECK-NEXT: mov r0, r2 +; CHECK-NEXT: bx lr entry: %cast = bitcast i8 127 to i8 %mul = shl nuw i8 %arg0, 1 @@ -198,9 +590,37 @@ entry: ret i8 %res } -; CHECK-LABEL: bitcast_i16_minus -; CHECK-NOT: uxt define i16 @bitcast_i16_minus(i16 zeroext %arg0, i16 zeroext %arg1) { +; CHECK-NODSP-LABEL: bitcast_i16_minus: +; CHECK-NODSP: @ %bb.0: @ %entry +; CHECK-NODSP-NEXT: eor r2, r0, #7 +; CHECK-NODSP-NEXT: movw r0, #32657 +; CHECK-NODSP-NEXT: cmp r2, r1 +; CHECK-NODSP-NEXT: itt eq +; CHECK-NODSP-NEXT: movweq r0, #53191 +; CHECK-NODSP-NEXT: movteq r0, #65535 +; CHECK-NODSP-NEXT: bx lr +; +; CHECK-DSP-LABEL: bitcast_i16_minus: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: eor r2, r0, #7 +; CHECK-DSP-NEXT: movw r0, #32657 +; CHECK-DSP-NEXT: cmp r2, r1 +; CHECK-DSP-NEXT: itt eq +; CHECK-DSP-NEXT: movweq r0, #53191 +; CHECK-DSP-NEXT: movteq r0, #65535 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: bitcast_i16_minus: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: eor r2, r0, #7 +; CHECK-DSP-IMM-NEXT: movw r0, #32657 +; CHECK-DSP-IMM-NEXT: cmp r2, r1 +; CHECK-DSP-IMM-NEXT: it eq +; CHECK-DSP-IMM-NEXT: movweq r0, #53191 +; CHECK-DSP-IMM-NEXT: it eq +; CHECK-DSP-IMM-NEXT: movteq r0, #65535 +; CHECK-DSP-IMM-NEXT: bx lr entry: %cast = bitcast i16 -12345 to i16 %xor = xor i16 %arg0, 7 @@ -209,9 +629,15 @@ entry: ret i16 %res } -; CHECK-LABEL: bitcast_i8_minus -; CHECK-NOT: uxt define i8 @bitcast_i8_minus(i8 zeroext %arg0, i8 zeroext %arg1) { +; CHECK-LABEL: bitcast_i8_minus: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: and r2, r0, #3 +; CHECK-NEXT: mvn r0, #127 +; CHECK-NEXT: cmp r2, r1 +; CHECK-NEXT: it ne +; CHECK-NEXT: mvnne r0, #126 +; CHECK-NEXT: bx lr entry: %cast = bitcast i8 -127 to i8 %and = and i8 %arg0, 3 @@ -226,9 +652,48 @@ declare i32 @dummy(i32, i32) @sh1 = hidden local_unnamed_addr global i16 0, align 2 @d_sh = hidden local_unnamed_addr global [16 x i16] zeroinitializer, align 2 -; CHECK-LABEL: two_stage_zext_trunc_mix -; CHECK-NOT: uxt define i8* @two_stage_zext_trunc_mix(i32* %this, i32 %__pos1, i32 %__n1, i32** %__str, i32 %__pos2, i32 %__n2) { +; CHECK-NODSP-V8-LABEL: two_stage_zext_trunc_mix: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldr.w r12, [sp] +; CHECK-NODSP-V8-NEXT: ldrb r2, [r0] +; CHECK-NODSP-V8-NEXT: add.w r0, r3, r12 +; CHECK-NODSP-V8-NEXT: lsls r2, r2, #31 +; CHECK-NODSP-V8-NEXT: it eq +; CHECK-NODSP-V8-NEXT: addeq r0, r3, r1 +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: two_stage_zext_trunc_mix: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrb r2, [r0] +; CHECK-NODSP-V7-NEXT: ldr.w r12, [sp] +; CHECK-NODSP-V7-NEXT: add.w r0, r3, r12 +; CHECK-NODSP-V7-NEXT: lsls r2, r2, #31 +; CHECK-NODSP-V7-NEXT: it eq +; CHECK-NODSP-V7-NEXT: addeq r0, r3, r1 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: two_stage_zext_trunc_mix: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldr r2, [sp] +; CHECK-DSP-NEXT: ldrb r0, [r0] +; CHECK-DSP-NEXT: add r2, r3 +; CHECK-DSP-NEXT: lsls r0, r0, #31 +; CHECK-DSP-NEXT: it eq +; CHECK-DSP-NEXT: addeq r2, r3, r1 +; CHECK-DSP-NEXT: mov r0, r2 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: two_stage_zext_trunc_mix: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldr.w r12, [sp] +; CHECK-DSP-IMM-NEXT: ldrb r2, [r0] +; CHECK-DSP-IMM-NEXT: adds r0, r3, r1 +; CHECK-DSP-IMM-NEXT: add r12, r3 +; CHECK-DSP-IMM-NEXT: lsls r1, r2, #31 +; CHECK-DSP-IMM-NEXT: it ne +; CHECK-DSP-IMM-NEXT: movne r0, r12 +; CHECK-DSP-IMM-NEXT: bx lr entry: %__size_.i.i.i.i = bitcast i32** %__str to i8* %0 = load i8, i8* %__size_.i.i.i.i, align 4 @@ -250,9 +715,60 @@ entry: ret i8* %res } -; CHECK-LABEL: search_through_zext_1 -; CHECK-NOT: uxt define i8 @search_through_zext_1(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c) { +; CHECK-NODSP-V8-LABEL: search_through_zext_1: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: subs r3, r1, r0 +; CHECK-NODSP-V8-NEXT: add.w r12, r0, r1 +; CHECK-NODSP-V8-NEXT: cmp r3, r2 +; CHECK-NODSP-V8-NEXT: it ls +; CHECK-NODSP-V8-NEXT: movls r0, r1 +; CHECK-NODSP-V8-NEXT: cmp r12, r2 +; CHECK-NODSP-V8-NEXT: it hs +; CHECK-NODSP-V8-NEXT: movhs r0, #0 +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: search_through_zext_1: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: subs r3, r1, r0 +; CHECK-NODSP-V7-NEXT: cmp r3, r2 +; CHECK-NODSP-V7-NEXT: mov r3, r1 +; CHECK-NODSP-V7-NEXT: it hi +; CHECK-NODSP-V7-NEXT: movhi r3, r0 +; CHECK-NODSP-V7-NEXT: add r0, r1 +; CHECK-NODSP-V7-NEXT: cmp r0, r2 +; CHECK-NODSP-V7-NEXT: it hs +; CHECK-NODSP-V7-NEXT: movhs r3, #0 +; CHECK-NODSP-V7-NEXT: mov r0, r3 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: search_through_zext_1: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: subs r3, r1, r0 +; CHECK-DSP-NEXT: cmp r3, r2 +; CHECK-DSP-NEXT: mov r3, r1 +; CHECK-DSP-NEXT: it hi +; CHECK-DSP-NEXT: movhi r3, r0 +; CHECK-DSP-NEXT: add r0, r1 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: it hs +; CHECK-DSP-NEXT: movhs r3, #0 +; CHECK-DSP-NEXT: mov r0, r3 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: search_through_zext_1: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: subs r3, r1, r0 +; CHECK-DSP-IMM-NEXT: cmp r3, r2 +; CHECK-DSP-IMM-NEXT: mov r3, r1 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r3, r0 +; CHECK-DSP-IMM-NEXT: add r1, r0 +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: cmp r1, r2 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r3 +; CHECK-DSP-IMM-NEXT: bx lr entry: %add = add nuw i8 %a, %b %conv = zext i8 %add to i16 @@ -274,10 +790,69 @@ if.end: ; TODO: We should be able to remove the uxtb here. The transform fails because ; the icmp ugt uses an i32, which is too large... but this doesn't matter ; because it won't be writing a large value to a register as a result. -; CHECK-LABEL: search_through_zext_2 -; CHECK: uxtb -; CHECK: uxtb define i8 @search_through_zext_2(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c, i32 %d) { +; CHECK-NODSP-V8-LABEL: search_through_zext_2: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: push {r7, lr} +; CHECK-NODSP-V8-NEXT: sub.w lr, r1, r0 +; CHECK-NODSP-V8-NEXT: add.w r12, r0, r1 +; CHECK-NODSP-V8-NEXT: uxtb.w lr, lr +; CHECK-NODSP-V8-NEXT: uxtb.w r12, r12 +; CHECK-NODSP-V8-NEXT: cmp lr, r3 +; CHECK-NODSP-V8-NEXT: it ls +; CHECK-NODSP-V8-NEXT: movls r0, r1 +; CHECK-NODSP-V8-NEXT: cmp r12, r2 +; CHECK-NODSP-V8-NEXT: it hs +; CHECK-NODSP-V8-NEXT: movhs r0, #0 +; CHECK-NODSP-V8-NEXT: pop {r7, pc} +; +; CHECK-NODSP-V7-LABEL: search_through_zext_2: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: sub.w r12, r1, r0 +; CHECK-NODSP-V7-NEXT: uxtb.w r12, r12 +; CHECK-NODSP-V7-NEXT: cmp r12, r3 +; CHECK-NODSP-V7-NEXT: mov r3, r1 +; CHECK-NODSP-V7-NEXT: it hi +; CHECK-NODSP-V7-NEXT: movhi r3, r0 +; CHECK-NODSP-V7-NEXT: add r0, r1 +; CHECK-NODSP-V7-NEXT: uxtb r0, r0 +; CHECK-NODSP-V7-NEXT: cmp r0, r2 +; CHECK-NODSP-V7-NEXT: it hs +; CHECK-NODSP-V7-NEXT: movhs r3, #0 +; CHECK-NODSP-V7-NEXT: mov r0, r3 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: search_through_zext_2: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: sub.w r12, r1, r0 +; CHECK-DSP-NEXT: uxtb.w r12, r12 +; CHECK-DSP-NEXT: cmp r12, r3 +; CHECK-DSP-NEXT: mov r3, r1 +; CHECK-DSP-NEXT: it hi +; CHECK-DSP-NEXT: movhi r3, r0 +; CHECK-DSP-NEXT: add r0, r1 +; CHECK-DSP-NEXT: uxtb r0, r0 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: it hs +; CHECK-DSP-NEXT: movhs r3, #0 +; CHECK-DSP-NEXT: mov r0, r3 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: search_through_zext_2: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: sub.w r12, r1, r0 +; CHECK-DSP-IMM-NEXT: uxtb.w r12, r12 +; CHECK-DSP-IMM-NEXT: cmp r12, r3 +; CHECK-DSP-IMM-NEXT: mov r3, r1 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r3, r0 +; CHECK-DSP-IMM-NEXT: add r0, r1 +; CHECK-DSP-IMM-NEXT: uxtb r1, r0 +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: cmp r1, r2 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r3 +; CHECK-DSP-IMM-NEXT: bx lr entry: %add = add nuw i8 %a, %b %conv = zext i8 %add to i16 @@ -299,10 +874,53 @@ if.end: ; TODO: We should be able to remove the uxtb here as all the calculations are ; performed on i8s. The promotion of i8 to i16 and then the later truncation ; results in the uxtb. -; CHECK-LABEL: search_through_zext_3 -; CHECK: uxtb -; CHECK: uxtb define i8 @search_through_zext_3(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c, i32 %d) { +; CHECK-NODSP-LABEL: search_through_zext_3: +; CHECK-NODSP: @ %bb.0: @ %entry +; CHECK-NODSP-NEXT: add.w r12, r0, r1 +; CHECK-NODSP-NEXT: uxtb.w r12, r12 +; CHECK-NODSP-NEXT: cmp r12, r2 +; CHECK-NODSP-NEXT: itt hs +; CHECK-NODSP-NEXT: movhs r0, #0 +; CHECK-NODSP-NEXT: bxhs lr +; CHECK-NODSP-NEXT: sub.w r2, r1, r12 +; CHECK-NODSP-NEXT: uxtb r2, r2 +; CHECK-NODSP-NEXT: cmp r2, r3 +; CHECK-NODSP-NEXT: it ls +; CHECK-NODSP-NEXT: movls r0, r1 +; CHECK-NODSP-NEXT: bx lr +; +; CHECK-DSP-LABEL: search_through_zext_3: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: add.w r12, r0, r1 +; CHECK-DSP-NEXT: uxtb.w r12, r12 +; CHECK-DSP-NEXT: cmp r12, r2 +; CHECK-DSP-NEXT: itt hs +; CHECK-DSP-NEXT: movhs r0, #0 +; CHECK-DSP-NEXT: bxhs lr +; CHECK-DSP-NEXT: sub.w r2, r1, r12 +; CHECK-DSP-NEXT: uxtb r2, r2 +; CHECK-DSP-NEXT: cmp r2, r3 +; CHECK-DSP-NEXT: it ls +; CHECK-DSP-NEXT: movls r0, r1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: search_through_zext_3: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: add.w r12, r0, r1 +; CHECK-DSP-IMM-NEXT: uxtb.w r12, r12 +; CHECK-DSP-IMM-NEXT: cmp r12, r2 +; CHECK-DSP-IMM-NEXT: bhs .LBB14_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %if.then +; CHECK-DSP-IMM-NEXT: sub.w r2, r1, r12 +; CHECK-DSP-IMM-NEXT: uxtb r2, r2 +; CHECK-DSP-IMM-NEXT: cmp r2, r3 +; CHECK-DSP-IMM-NEXT: it ls +; CHECK-DSP-IMM-NEXT: movls r0, r1 +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .LBB14_2: +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: bx lr entry: %add = add nuw i8 %a, %b %conv = zext i8 %add to i16 @@ -323,9 +941,67 @@ if.end: } ; TODO: We should be able to remove the uxt that gets introduced for %conv2 -; CHECK-LABEL: search_through_zext_cmp -; CHECK: uxt define i8 @search_through_zext_cmp(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c) { +; CHECK-NODSP-V8-LABEL: search_through_zext_cmp: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: subs r3, r1, r0 +; CHECK-NODSP-V8-NEXT: subs.w r12, r1, r0 +; CHECK-NODSP-V8-NEXT: uxtb r3, r3 +; CHECK-NODSP-V8-NEXT: it ne +; CHECK-NODSP-V8-NEXT: movne.w r12, #1 +; CHECK-NODSP-V8-NEXT: cmp r3, r2 +; CHECK-NODSP-V8-NEXT: it ls +; CHECK-NODSP-V8-NEXT: movls r0, r1 +; CHECK-NODSP-V8-NEXT: cmp r12, r2 +; CHECK-NODSP-V8-NEXT: it hs +; CHECK-NODSP-V8-NEXT: movhs r0, #0 +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: search_through_zext_cmp: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: subs r3, r1, r0 +; CHECK-NODSP-V7-NEXT: subs.w r12, r1, r0 +; CHECK-NODSP-V7-NEXT: it ne +; CHECK-NODSP-V7-NEXT: movne.w r12, #1 +; CHECK-NODSP-V7-NEXT: uxtb r3, r3 +; CHECK-NODSP-V7-NEXT: cmp r3, r2 +; CHECK-NODSP-V7-NEXT: it ls +; CHECK-NODSP-V7-NEXT: movls r0, r1 +; CHECK-NODSP-V7-NEXT: cmp r12, r2 +; CHECK-NODSP-V7-NEXT: it hs +; CHECK-NODSP-V7-NEXT: movhs r0, #0 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: search_through_zext_cmp: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: subs r3, r1, r0 +; CHECK-DSP-NEXT: subs.w r12, r1, r0 +; CHECK-DSP-NEXT: uxtb r3, r3 +; CHECK-DSP-NEXT: it ne +; CHECK-DSP-NEXT: movne.w r12, #1 +; CHECK-DSP-NEXT: cmp r3, r2 +; CHECK-DSP-NEXT: it ls +; CHECK-DSP-NEXT: movls r0, r1 +; CHECK-DSP-NEXT: cmp r12, r2 +; CHECK-DSP-NEXT: it hs +; CHECK-DSP-NEXT: movhs r0, #0 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: search_through_zext_cmp: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: subs.w r12, r1, r0 +; CHECK-DSP-IMM-NEXT: it ne +; CHECK-DSP-IMM-NEXT: movne.w r12, #1 +; CHECK-DSP-IMM-NEXT: subs r3, r1, r0 +; CHECK-DSP-IMM-NEXT: uxtb r3, r3 +; CHECK-DSP-IMM-NEXT: cmp r3, r2 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r1, r0 +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: cmp r12, r2 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r1 +; CHECK-DSP-IMM-NEXT: bx lr entry: %cmp = icmp ne i8 %a, %b %conv = zext i1 %cmp to i16 @@ -344,9 +1020,58 @@ if.end: ret i8 %retval } -; CHECK-LABEL: search_through_zext_load -; CHECK-NOT: uxt define i8 @search_through_zext_load(i8* %a, i8 zeroext %b, i16 zeroext %c) { +; CHECK-NODSP-V8-LABEL: search_through_zext_load: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldrb r3, [r0] +; CHECK-NODSP-V8-NEXT: mov r0, r1 +; CHECK-NODSP-V8-NEXT: subs r1, r1, r3 +; CHECK-NODSP-V8-NEXT: cmp r1, r2 +; CHECK-NODSP-V8-NEXT: it hi +; CHECK-NODSP-V8-NEXT: movhi r0, r3 +; CHECK-NODSP-V8-NEXT: cmp r3, r2 +; CHECK-NODSP-V8-NEXT: it hs +; CHECK-NODSP-V8-NEXT: movhs r0, #0 +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: search_through_zext_load: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] +; CHECK-NODSP-V7-NEXT: subs r3, r1, r0 +; CHECK-NODSP-V7-NEXT: cmp r3, r2 +; CHECK-NODSP-V7-NEXT: it hi +; CHECK-NODSP-V7-NEXT: movhi r1, r0 +; CHECK-NODSP-V7-NEXT: cmp r0, r2 +; CHECK-NODSP-V7-NEXT: it hs +; CHECK-NODSP-V7-NEXT: movhs r1, #0 +; CHECK-NODSP-V7-NEXT: mov r0, r1 +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: search_through_zext_load: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrb r0, [r0] +; CHECK-DSP-NEXT: subs r3, r1, r0 +; CHECK-DSP-NEXT: cmp r3, r2 +; CHECK-DSP-NEXT: it hi +; CHECK-DSP-NEXT: movhi r1, r0 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: it hs +; CHECK-DSP-NEXT: movhs r1, #0 +; CHECK-DSP-NEXT: mov r0, r1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: search_through_zext_load: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldrb r3, [r0] +; CHECK-DSP-IMM-NEXT: subs r0, r1, r3 +; CHECK-DSP-IMM-NEXT: cmp r0, r2 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r1, r3 +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: cmp r3, r2 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r1 +; CHECK-DSP-IMM-NEXT: bx lr entry: %load = load i8, i8* %a %conv = zext i8 %load to i16 @@ -365,11 +1090,72 @@ if.end: ret i8 %retval } -; CHECK-LABEL: trunc_sink_less_than -; CHECK-NOT: uxth -; CHECK: cmp -; CHECK: uxtb define i16 @trunc_sink_less_than_cmp(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d) { +; CHECK-NODSP-V8-LABEL: trunc_sink_less_than_cmp: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: push {r7, lr} +; CHECK-NODSP-V8-NEXT: sub.w r12, r1, r0 +; CHECK-NODSP-V8-NEXT: adds r3, #1 +; CHECK-NODSP-V8-NEXT: uxth.w lr, r12 +; CHECK-NODSP-V8-NEXT: uxtb.w r12, r12 +; CHECK-NODSP-V8-NEXT: uxtb r3, r3 +; CHECK-NODSP-V8-NEXT: cmp r12, r3 +; CHECK-NODSP-V8-NEXT: it ls +; CHECK-NODSP-V8-NEXT: movls r0, r1 +; CHECK-NODSP-V8-NEXT: cmp lr, r2 +; CHECK-NODSP-V8-NEXT: it hs +; CHECK-NODSP-V8-NEXT: movhs r0, #0 +; CHECK-NODSP-V8-NEXT: pop {r7, pc} +; +; CHECK-NODSP-V7-LABEL: trunc_sink_less_than_cmp: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: .save {r7, lr} +; CHECK-NODSP-V7-NEXT: push {r7, lr} +; CHECK-NODSP-V7-NEXT: adds r3, #1 +; CHECK-NODSP-V7-NEXT: sub.w r12, r1, r0 +; CHECK-NODSP-V7-NEXT: uxtb.w lr, r12 +; CHECK-NODSP-V7-NEXT: uxtb r3, r3 +; CHECK-NODSP-V7-NEXT: cmp lr, r3 +; CHECK-NODSP-V7-NEXT: it ls +; CHECK-NODSP-V7-NEXT: movls r0, r1 +; CHECK-NODSP-V7-NEXT: uxth.w r1, r12 +; CHECK-NODSP-V7-NEXT: cmp r1, r2 +; CHECK-NODSP-V7-NEXT: it hs +; CHECK-NODSP-V7-NEXT: movhs r0, #0 +; CHECK-NODSP-V7-NEXT: pop {r7, pc} +; +; CHECK-DSP-LABEL: trunc_sink_less_than_cmp: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: push {r7, lr} +; CHECK-DSP-NEXT: adds r3, #1 +; CHECK-DSP-NEXT: sub.w r12, r1, r0 +; CHECK-DSP-NEXT: uxtb.w lr, r12 +; CHECK-DSP-NEXT: uxtb r3, r3 +; CHECK-DSP-NEXT: cmp lr, r3 +; CHECK-DSP-NEXT: it ls +; CHECK-DSP-NEXT: movls r0, r1 +; CHECK-DSP-NEXT: uxth.w r1, r12 +; CHECK-DSP-NEXT: cmp r1, r2 +; CHECK-DSP-NEXT: it hs +; CHECK-DSP-NEXT: movhs r0, #0 +; CHECK-DSP-NEXT: pop {r7, pc} +; +; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_cmp: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: push {r7, lr} +; CHECK-DSP-IMM-NEXT: adds r3, #1 +; CHECK-DSP-IMM-NEXT: sub.w r12, r1, r0 +; CHECK-DSP-IMM-NEXT: uxtb r3, r3 +; CHECK-DSP-IMM-NEXT: uxtb.w lr, r12 +; CHECK-DSP-IMM-NEXT: cmp lr, r3 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r1, r0 +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: uxth.w r3, r12 +; CHECK-DSP-IMM-NEXT: cmp r3, r2 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r1 +; CHECK-DSP-IMM-NEXT: pop {r7, pc} entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c @@ -388,11 +1174,72 @@ if.end: } ; TODO: We should be able to remove the uxth introduced to handle %sub -; CHECK-LABEL: trunc_sink_less_than_arith -; CHECK: uxth -; CHECK: cmp -; CHECK: uxtb define i16 @trunc_sink_less_than_arith(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8 zeroext %e) { +; CHECK-NODSP-V8-LABEL: trunc_sink_less_than_arith: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: push {r4, lr} +; CHECK-NODSP-V8-NEXT: sub.w lr, r1, r0 +; CHECK-NODSP-V8-NEXT: ldr.w r12, [sp, #8] +; CHECK-NODSP-V8-NEXT: add r3, lr +; CHECK-NODSP-V8-NEXT: uxtb r3, r3 +; CHECK-NODSP-V8-NEXT: uxth.w r4, lr +; CHECK-NODSP-V8-NEXT: cmp r12, r3 +; CHECK-NODSP-V8-NEXT: it ls +; CHECK-NODSP-V8-NEXT: movls r0, r1 +; CHECK-NODSP-V8-NEXT: cmp r4, r2 +; CHECK-NODSP-V8-NEXT: it hs +; CHECK-NODSP-V8-NEXT: movhs r0, #0 +; CHECK-NODSP-V8-NEXT: pop {r4, pc} +; +; CHECK-NODSP-V7-LABEL: trunc_sink_less_than_arith: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: .save {r7, lr} +; CHECK-NODSP-V7-NEXT: push {r7, lr} +; CHECK-NODSP-V7-NEXT: sub.w lr, r1, r0 +; CHECK-NODSP-V7-NEXT: ldr.w r12, [sp, #8] +; CHECK-NODSP-V7-NEXT: add r3, lr +; CHECK-NODSP-V7-NEXT: uxtb r3, r3 +; CHECK-NODSP-V7-NEXT: cmp r12, r3 +; CHECK-NODSP-V7-NEXT: it ls +; CHECK-NODSP-V7-NEXT: movls r0, r1 +; CHECK-NODSP-V7-NEXT: uxth.w r1, lr +; CHECK-NODSP-V7-NEXT: cmp r1, r2 +; CHECK-NODSP-V7-NEXT: it hs +; CHECK-NODSP-V7-NEXT: movhs r0, #0 +; CHECK-NODSP-V7-NEXT: pop {r7, pc} +; +; CHECK-DSP-LABEL: trunc_sink_less_than_arith: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: push {r7, lr} +; CHECK-DSP-NEXT: sub.w r12, r1, r0 +; CHECK-DSP-NEXT: add r3, r12 +; CHECK-DSP-NEXT: uxtb.w lr, r3 +; CHECK-DSP-NEXT: ldr r3, [sp, #8] +; CHECK-DSP-NEXT: cmp r3, lr +; CHECK-DSP-NEXT: it ls +; CHECK-DSP-NEXT: movls r0, r1 +; CHECK-DSP-NEXT: uxth.w r1, r12 +; CHECK-DSP-NEXT: cmp r1, r2 +; CHECK-DSP-NEXT: it hs +; CHECK-DSP-NEXT: movhs r0, #0 +; CHECK-DSP-NEXT: pop {r7, pc} +; +; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_arith: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: push {r7, lr} +; CHECK-DSP-IMM-NEXT: sub.w lr, r1, r0 +; CHECK-DSP-IMM-NEXT: ldr.w r12, [sp, #8] +; CHECK-DSP-IMM-NEXT: add r3, lr +; CHECK-DSP-IMM-NEXT: uxtb r3, r3 +; CHECK-DSP-IMM-NEXT: cmp r12, r3 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r1, r0 +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: uxth.w r3, lr +; CHECK-DSP-IMM-NEXT: cmp r3, r2 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r1 +; CHECK-DSP-IMM-NEXT: pop {r7, pc} entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c @@ -410,11 +1257,42 @@ if.end: ret i16 %retval } -; CHECK-LABEL: trunc_sink_less_than_store -; CHECK-NOT: uxt -; CHECK: cmp -; CHECK-NOT: uxt define i16 @trunc_sink_less_than_store(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8* %e) { +; CHECK-NODSP-LABEL: trunc_sink_less_than_store: +; CHECK-NODSP: @ %bb.0: @ %entry +; CHECK-NODSP-NEXT: subs r0, r1, r0 +; CHECK-NODSP-NEXT: cmp r0, r2 +; CHECK-NODSP-NEXT: iteee hs +; CHECK-NODSP-NEXT: movhs r0, #0 +; CHECK-NODSP-NEXT: ldrlo r1, [sp] +; CHECK-NODSP-NEXT: addlo r2, r3, r0 +; CHECK-NODSP-NEXT: strblo r2, [r1] +; CHECK-NODSP-NEXT: bx lr +; +; CHECK-DSP-LABEL: trunc_sink_less_than_store: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: subs r0, r1, r0 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: iteee hs +; CHECK-DSP-NEXT: movhs r0, #0 +; CHECK-DSP-NEXT: ldrlo r1, [sp] +; CHECK-DSP-NEXT: addlo r2, r3, r0 +; CHECK-DSP-NEXT: strblo r2, [r1] +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_store: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: subs r0, r1, r0 +; CHECK-DSP-IMM-NEXT: cmp r0, r2 +; CHECK-DSP-IMM-NEXT: bhs .LBB19_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %if.then +; CHECK-DSP-IMM-NEXT: ldr r1, [sp] +; CHECK-DSP-IMM-NEXT: adds r2, r3, r0 +; CHECK-DSP-IMM-NEXT: strb r2, [r1] +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .LBB19_2: +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: bx lr entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c @@ -431,9 +1309,34 @@ if.end: ret i16 %retval } -; CHECK-LABEL: trunc_sink_less_than_ret -; CHECK: uxt{{.*}}b define i8 @trunc_sink_less_than_ret(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8 zeroext %e) { +; CHECK-NODSP-LABEL: trunc_sink_less_than_ret: +; CHECK-NODSP: @ %bb.0: @ %entry +; CHECK-NODSP-NEXT: subs r1, r1, r0 +; CHECK-NODSP-NEXT: movs r0, #0 +; CHECK-NODSP-NEXT: cmp r1, r2 +; CHECK-NODSP-NEXT: it lo +; CHECK-NODSP-NEXT: uxtablo r0, r3, r1 +; CHECK-NODSP-NEXT: bx lr +; +; CHECK-DSP-LABEL: trunc_sink_less_than_ret: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: subs r1, r1, r0 +; CHECK-DSP-NEXT: movs r0, #0 +; CHECK-DSP-NEXT: cmp r1, r2 +; CHECK-DSP-NEXT: it lo +; CHECK-DSP-NEXT: uxtablo r0, r3, r1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_ret: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: subs r1, r1, r0 +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: cmp r1, r2 +; CHECK-DSP-IMM-NEXT: uxtab r3, r3, r1 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r0, r3 +; CHECK-DSP-IMM-NEXT: bx lr entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c @@ -449,11 +1352,37 @@ if.end: ret i8 %retval } -; CHECK-LABEL: trunc_sink_less_than_zext_ret -; CHECK-NOT: uxth -; CHECK: sub -; CHECK: uxtb define zeroext i8 @trunc_sink_less_than_zext_ret(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i8 zeroext %d, i8 zeroext %e) { +; CHECK-NODSP-LABEL: trunc_sink_less_than_zext_ret: +; CHECK-NODSP: @ %bb.0: @ %entry +; CHECK-NODSP-NEXT: subs r0, r1, r0 +; CHECK-NODSP-NEXT: movs r1, #0 +; CHECK-NODSP-NEXT: cmp r0, r2 +; CHECK-NODSP-NEXT: it lo +; CHECK-NODSP-NEXT: addlo r1, r3, r0 +; CHECK-NODSP-NEXT: uxtb r0, r1 +; CHECK-NODSP-NEXT: bx lr +; +; CHECK-DSP-LABEL: trunc_sink_less_than_zext_ret: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: subs r0, r1, r0 +; CHECK-DSP-NEXT: movs r1, #0 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: it lo +; CHECK-DSP-NEXT: addlo r1, r3, r0 +; CHECK-DSP-NEXT: uxtb r0, r1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: trunc_sink_less_than_zext_ret: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: subs r0, r1, r0 +; CHECK-DSP-IMM-NEXT: adds r1, r3, r0 +; CHECK-DSP-IMM-NEXT: movs r3, #0 +; CHECK-DSP-IMM-NEXT: cmp r0, r2 +; CHECK-DSP-IMM-NEXT: it lo +; CHECK-DSP-IMM-NEXT: movlo r3, r1 +; CHECK-DSP-IMM-NEXT: uxtb r0, r3 +; CHECK-DSP-IMM-NEXT: bx lr entry: %sub = sub nuw i16 %b, %a %cmp = icmp ult i16 %sub, %c @@ -469,9 +1398,13 @@ if.end: ret i8 %retval } -; CHECK-LABEL: bitcast_i1 -; CHECK-NOT: uxt define i32 @bitcast_i1(i16 zeroext %a, i32 %b, i32 %c) { +; CHECK-LABEL: bitcast_i1: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: ands r0, r0, #1 +; CHECK-NEXT: it ne +; CHECK-NEXT: movne r0, r1 +; CHECK-NEXT: bx lr entry: %0 = bitcast i1 1 to i1 %1 = trunc i16 %a to i1 @@ -490,12 +1423,87 @@ exit: ret i32 %retval } -; CHECK-LABEL: search_back_through_trunc -; CHECK-NOT: uxt -; CHECK: cmp -; CHECK: strb -; CHECK: strb define void @search_back_through_trunc(i8* %a, i8* %b, i8* %c, i8* %d, i16* %e) { +; CHECK-NODSP-V8-LABEL: search_back_through_trunc: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: push {r7, lr} +; CHECK-NODSP-V8-NEXT: ldrb.w r12, [r0] +; CHECK-NODSP-V8-NEXT: ldrb.w lr, [r1] +; CHECK-NODSP-V8-NEXT: ldrb r1, [r2] +; CHECK-NODSP-V8-NEXT: ldrb r0, [r3] +; CHECK-NODSP-V8-NEXT: orr.w r12, lr, r12, lsl #8 +; CHECK-NODSP-V8-NEXT: orr.w r0, r0, r1, lsl #8 +; CHECK-NODSP-V8-NEXT: cmp r12, r0 +; CHECK-NODSP-V8-NEXT: beq .LBB23_2 +; CHECK-NODSP-V8-NEXT: @ %bb.1: @ %if.else136 +; CHECK-NODSP-V8-NEXT: ldr r0, [sp, #8] +; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V8-NEXT: uxtb.w lr, r0 +; CHECK-NODSP-V8-NEXT: lsrs r1, r0, #8 +; CHECK-NODSP-V8-NEXT: .LBB23_2: @ %if.end183 +; CHECK-NODSP-V8-NEXT: strb r1, [r2] +; CHECK-NODSP-V8-NEXT: strb.w lr, [r3] +; CHECK-NODSP-V8-NEXT: pop {r7, pc} +; +; CHECK-NODSP-V7-LABEL: search_back_through_trunc: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: .save {r4, lr} +; CHECK-NODSP-V7-NEXT: push {r4, lr} +; CHECK-NODSP-V7-NEXT: ldrb r4, [r0] +; CHECK-NODSP-V7-NEXT: ldrb.w r12, [r2] +; CHECK-NODSP-V7-NEXT: ldrb r0, [r1] +; CHECK-NODSP-V7-NEXT: ldrb.w lr, [r3] +; CHECK-NODSP-V7-NEXT: orr.w r4, r0, r4, lsl #8 +; CHECK-NODSP-V7-NEXT: orr.w r1, lr, r12, lsl #8 +; CHECK-NODSP-V7-NEXT: cmp r4, r1 +; CHECK-NODSP-V7-NEXT: itttt ne +; CHECK-NODSP-V7-NEXT: ldrne r0, [sp, #8] +; CHECK-NODSP-V7-NEXT: ldrhne r0, [r0] +; CHECK-NODSP-V7-NEXT: lsrne.w r12, r0, #8 +; CHECK-NODSP-V7-NEXT: uxtbne r0, r0 +; CHECK-NODSP-V7-NEXT: strb.w r12, [r2] +; CHECK-NODSP-V7-NEXT: strb r0, [r3] +; CHECK-NODSP-V7-NEXT: pop {r4, pc} +; +; CHECK-DSP-LABEL: search_back_through_trunc: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: push {r4, lr} +; CHECK-DSP-NEXT: ldrb r4, [r0] +; CHECK-DSP-NEXT: ldrb r0, [r1] +; CHECK-DSP-NEXT: ldrb.w r12, [r2] +; CHECK-DSP-NEXT: ldrb.w lr, [r3] +; CHECK-DSP-NEXT: orr.w lr, lr, r12, lsl #8 +; CHECK-DSP-NEXT: orr.w r1, r0, r4, lsl #8 +; CHECK-DSP-NEXT: cmp r1, lr +; CHECK-DSP-NEXT: itttt ne +; CHECK-DSP-NEXT: ldrne r0, [sp, #8] +; CHECK-DSP-NEXT: ldrhne r0, [r0] +; CHECK-DSP-NEXT: lsrne.w r12, r0, #8 +; CHECK-DSP-NEXT: uxtbne r0, r0 +; CHECK-DSP-NEXT: strb.w r12, [r2] +; CHECK-DSP-NEXT: strb r0, [r3] +; CHECK-DSP-NEXT: pop {r4, pc} +; +; CHECK-DSP-IMM-LABEL: search_back_through_trunc: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: push {r4, lr} +; CHECK-DSP-IMM-NEXT: ldrb r4, [r0] +; CHECK-DSP-IMM-NEXT: ldrb.w r12, [r2] +; CHECK-DSP-IMM-NEXT: ldrb r0, [r1] +; CHECK-DSP-IMM-NEXT: ldrb.w lr, [r3] +; CHECK-DSP-IMM-NEXT: orr.w r4, r0, r4, lsl #8 +; CHECK-DSP-IMM-NEXT: orr.w r1, lr, r12, lsl #8 +; CHECK-DSP-IMM-NEXT: cmp r4, r1 +; CHECK-DSP-IMM-NEXT: beq .LBB23_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %if.else136 +; CHECK-DSP-IMM-NEXT: ldr r0, [sp, #8] +; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] +; CHECK-DSP-IMM-NEXT: lsr.w r12, r0, #8 +; CHECK-DSP-IMM-NEXT: uxtb r0, r0 +; CHECK-DSP-IMM-NEXT: .LBB23_2: @ %if.end183 +; CHECK-DSP-IMM-NEXT: strb.w r12, [r2] +; CHECK-DSP-IMM-NEXT: strb r0, [r3] +; CHECK-DSP-IMM-NEXT: pop {r4, pc} entry: %0 = load i8, i8* %a, align 1 %conv106 = zext i8 %0 to i16 @@ -534,11 +1542,136 @@ if.end183: @a = common dso_local local_unnamed_addr global i8 0, align 1 @d = common dso_local local_unnamed_addr global i32 0, align 4 -; CHECK-LABEL: and_trunc -; CHECK: ldrh -; CHECK: sxth -; CHECK: uxtb define void @and_trunc_two_zext() { +; CHECK-NODSP-V8-LABEL: and_trunc_two_zext: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: movw r1, :lower16:b +; CHECK-NODSP-V8-NEXT: movt r1, :upper16:b +; CHECK-NODSP-V8-NEXT: ldrh r1, [r1] +; CHECK-NODSP-V8-NEXT: movw r3, :lower16:f +; CHECK-NODSP-V8-NEXT: sxth r2, r1 +; CHECK-NODSP-V8-NEXT: movt r3, :upper16:f +; CHECK-NODSP-V8-NEXT: str r2, [r3] +; CHECK-NODSP-V8-NEXT: movw r3, :lower16:a +; CHECK-NODSP-V8-NEXT: movt r3, :upper16:a +; CHECK-NODSP-V8-NEXT: movw r0, :lower16:c +; CHECK-NODSP-V8-NEXT: movw r2, :lower16:e +; CHECK-NODSP-V8-NEXT: ldrb r3, [r3] +; CHECK-NODSP-V8-NEXT: movt r0, :upper16:c +; CHECK-NODSP-V8-NEXT: and r1, r1, #1 +; CHECK-NODSP-V8-NEXT: movt r2, :upper16:e +; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V8-NEXT: strb r1, [r2] +; CHECK-NODSP-V8-NEXT: muls r1, r3, r1 +; CHECK-NODSP-V8-NEXT: uxtb r1, r1 +; CHECK-NODSP-V8-NEXT: movw r2, :lower16:d +; CHECK-NODSP-V8-NEXT: orrs r0, r1 +; CHECK-NODSP-V8-NEXT: movt r2, :upper16:d +; CHECK-NODSP-V8-NEXT: lsls r0, r0, #16 +; CHECK-NODSP-V8-NEXT: str r1, [r2] +; CHECK-NODSP-V8-NEXT: it eq +; CHECK-NODSP-V8-NEXT: bxeq lr +; CHECK-NODSP-V8-NEXT: .p2align 2 +; CHECK-NODSP-V8-NEXT: .LBB24_1: @ %for.cond +; CHECK-NODSP-V8-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NODSP-V8-NEXT: b .LBB24_1 +; +; CHECK-NODSP-V7-LABEL: and_trunc_two_zext: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: movw r1, :lower16:b +; CHECK-NODSP-V7-NEXT: movw r2, :lower16:a +; CHECK-NODSP-V7-NEXT: movt r1, :upper16:b +; CHECK-NODSP-V7-NEXT: movt r2, :upper16:a +; CHECK-NODSP-V7-NEXT: ldrh r1, [r1] +; CHECK-NODSP-V7-NEXT: movw r0, :lower16:c +; CHECK-NODSP-V7-NEXT: ldrb r2, [r2] +; CHECK-NODSP-V7-NEXT: movt r0, :upper16:c +; CHECK-NODSP-V7-NEXT: and r3, r1, #1 +; CHECK-NODSP-V7-NEXT: ldrh.w r12, [r0] +; CHECK-NODSP-V7-NEXT: movw r0, :lower16:e +; CHECK-NODSP-V7-NEXT: muls r2, r3, r2 +; CHECK-NODSP-V7-NEXT: movt r0, :upper16:e +; CHECK-NODSP-V7-NEXT: strb r3, [r0] +; CHECK-NODSP-V7-NEXT: sxth r0, r1 +; CHECK-NODSP-V7-NEXT: movw r1, :lower16:f +; CHECK-NODSP-V7-NEXT: movt r1, :upper16:f +; CHECK-NODSP-V7-NEXT: str r0, [r1] +; CHECK-NODSP-V7-NEXT: movw r1, :lower16:d +; CHECK-NODSP-V7-NEXT: movt r1, :upper16:d +; CHECK-NODSP-V7-NEXT: uxtb r0, r2 +; CHECK-NODSP-V7-NEXT: str r0, [r1] +; CHECK-NODSP-V7-NEXT: orr.w r0, r0, r12 +; CHECK-NODSP-V7-NEXT: lsls r0, r0, #16 +; CHECK-NODSP-V7-NEXT: it eq +; CHECK-NODSP-V7-NEXT: bxeq lr +; CHECK-NODSP-V7-NEXT: .LBB24_1: @ %for.cond +; CHECK-NODSP-V7-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NODSP-V7-NEXT: b .LBB24_1 +; +; CHECK-DSP-LABEL: and_trunc_two_zext: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: movw r0, :lower16:b +; CHECK-DSP-NEXT: movw r2, :lower16:f +; CHECK-DSP-NEXT: movt r0, :upper16:b +; CHECK-DSP-NEXT: movt r2, :upper16:f +; CHECK-DSP-NEXT: ldrh r0, [r0] +; CHECK-DSP-NEXT: sxth r1, r0 +; CHECK-DSP-NEXT: and r0, r0, #1 +; CHECK-DSP-NEXT: str r1, [r2] +; CHECK-DSP-NEXT: movw r1, :lower16:e +; CHECK-DSP-NEXT: movt r1, :upper16:e +; CHECK-DSP-NEXT: strb r0, [r1] +; CHECK-DSP-NEXT: movw r1, :lower16:a +; CHECK-DSP-NEXT: movt r1, :upper16:a +; CHECK-DSP-NEXT: ldrb r1, [r1] +; CHECK-DSP-NEXT: muls r0, r1, r0 +; CHECK-DSP-NEXT: movw r1, :lower16:d +; CHECK-DSP-NEXT: uxtb r0, r0 +; CHECK-DSP-NEXT: movt r1, :upper16:d +; CHECK-DSP-NEXT: str r0, [r1] +; CHECK-DSP-NEXT: movw r1, :lower16:c +; CHECK-DSP-NEXT: movt r1, :upper16:c +; CHECK-DSP-NEXT: ldrh r1, [r1] +; CHECK-DSP-NEXT: orrs r0, r1 +; CHECK-DSP-NEXT: lsls r0, r0, #16 +; CHECK-DSP-NEXT: it eq +; CHECK-DSP-NEXT: bxeq lr +; CHECK-DSP-NEXT: .LBB24_1: @ %for.cond +; CHECK-DSP-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-DSP-NEXT: b .LBB24_1 +; +; CHECK-DSP-IMM-LABEL: and_trunc_two_zext: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: movw r1, :lower16:b +; CHECK-DSP-IMM-NEXT: movw r2, :lower16:a +; CHECK-DSP-IMM-NEXT: movt r1, :upper16:b +; CHECK-DSP-IMM-NEXT: movt r2, :upper16:a +; CHECK-DSP-IMM-NEXT: ldrh r1, [r1] +; CHECK-DSP-IMM-NEXT: movw r0, :lower16:c +; CHECK-DSP-IMM-NEXT: ldrb r2, [r2] +; CHECK-DSP-IMM-NEXT: movt r0, :upper16:c +; CHECK-DSP-IMM-NEXT: and r3, r1, #1 +; CHECK-DSP-IMM-NEXT: ldrh.w r12, [r0] +; CHECK-DSP-IMM-NEXT: movw r0, :lower16:e +; CHECK-DSP-IMM-NEXT: muls r2, r3, r2 +; CHECK-DSP-IMM-NEXT: movt r0, :upper16:e +; CHECK-DSP-IMM-NEXT: strb r3, [r0] +; CHECK-DSP-IMM-NEXT: sxth r0, r1 +; CHECK-DSP-IMM-NEXT: movw r1, :lower16:f +; CHECK-DSP-IMM-NEXT: movt r1, :upper16:f +; CHECK-DSP-IMM-NEXT: str r0, [r1] +; CHECK-DSP-IMM-NEXT: movw r1, :lower16:d +; CHECK-DSP-IMM-NEXT: uxtb r0, r2 +; CHECK-DSP-IMM-NEXT: movt r1, :upper16:d +; CHECK-DSP-IMM-NEXT: str r0, [r1] +; CHECK-DSP-IMM-NEXT: orr.w r0, r0, r12 +; CHECK-DSP-IMM-NEXT: lsls r0, r0, #16 +; CHECK-DSP-IMM-NEXT: beq .LBB24_2 +; CHECK-DSP-IMM-NEXT: .LBB24_1: @ %for.cond +; CHECK-DSP-IMM-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-DSP-IMM-NEXT: b .LBB24_1 +; CHECK-DSP-IMM-NEXT: .LBB24_2: @ %if.end +; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* @c, align 2 %1 = load i16, i16* @b, align 2 @@ -563,9 +1696,79 @@ if.end: ret void } -; CHECK-LABEL: zext_urem_trunc -; CHECK-NOT: uxt define void @zext_urem_trunc() { +; CHECK-NODSP-V8-LABEL: zext_urem_trunc: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: movw r0, :lower16:c +; CHECK-NODSP-V8-NEXT: movt r0, :upper16:c +; CHECK-NODSP-V8-NEXT: ldrh r1, [r0] +; CHECK-NODSP-V8-NEXT: movw r0, :lower16:e +; CHECK-NODSP-V8-NEXT: movt r0, :upper16:e +; CHECK-NODSP-V8-NEXT: ldrb r0, [r0] +; CHECK-NODSP-V8-NEXT: cbz r1, .LBB25_2 +; CHECK-NODSP-V8-NEXT: @ %bb.1: @ %cond.false +; CHECK-NODSP-V8-NEXT: udiv r2, r0, r1 +; CHECK-NODSP-V8-NEXT: mls r0, r2, r1, r0 +; CHECK-NODSP-V8-NEXT: .LBB25_2: @ %cond.end +; CHECK-NODSP-V8-NEXT: movw r1, :lower16:a +; CHECK-NODSP-V8-NEXT: movt r1, :upper16:a +; CHECK-NODSP-V8-NEXT: strb r0, [r1] +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: zext_urem_trunc: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: .save {r7, lr} +; CHECK-NODSP-V7-NEXT: push {r7, lr} +; CHECK-NODSP-V7-NEXT: movw r0, :lower16:e +; CHECK-NODSP-V7-NEXT: movw r1, :lower16:c +; CHECK-NODSP-V7-NEXT: movt r0, :upper16:e +; CHECK-NODSP-V7-NEXT: movt r1, :upper16:c +; CHECK-NODSP-V7-NEXT: ldrh r1, [r1] +; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] +; CHECK-NODSP-V7-NEXT: cbz r1, .LBB25_2 +; CHECK-NODSP-V7-NEXT: @ %bb.1: @ %cond.false +; CHECK-NODSP-V7-NEXT: bl __aeabi_uidivmod +; CHECK-NODSP-V7-NEXT: mov r0, r1 +; CHECK-NODSP-V7-NEXT: .LBB25_2: @ %cond.end +; CHECK-NODSP-V7-NEXT: movw r1, :lower16:a +; CHECK-NODSP-V7-NEXT: movt r1, :upper16:a +; CHECK-NODSP-V7-NEXT: strb r0, [r1] +; CHECK-NODSP-V7-NEXT: pop {r7, pc} +; +; CHECK-DSP-LABEL: zext_urem_trunc: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: movw r1, :lower16:c +; CHECK-DSP-NEXT: movw r0, :lower16:e +; CHECK-DSP-NEXT: movt r1, :upper16:c +; CHECK-DSP-NEXT: movt r0, :upper16:e +; CHECK-DSP-NEXT: ldrh r1, [r1] +; CHECK-DSP-NEXT: ldrb r0, [r0] +; CHECK-DSP-NEXT: cmp r1, #0 +; CHECK-DSP-NEXT: itt ne +; CHECK-DSP-NEXT: udivne r2, r0, r1 +; CHECK-DSP-NEXT: mlsne r0, r2, r1, r0 +; CHECK-DSP-NEXT: movw r1, :lower16:a +; CHECK-DSP-NEXT: movt r1, :upper16:a +; CHECK-DSP-NEXT: strb r0, [r1] +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: zext_urem_trunc: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: movw r0, :lower16:e +; CHECK-DSP-IMM-NEXT: movw r1, :lower16:c +; CHECK-DSP-IMM-NEXT: movt r0, :upper16:e +; CHECK-DSP-IMM-NEXT: movt r1, :upper16:c +; CHECK-DSP-IMM-NEXT: ldrh r1, [r1] +; CHECK-DSP-IMM-NEXT: ldrb r0, [r0] +; CHECK-DSP-IMM-NEXT: cbz r1, .LBB25_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %cond.false +; CHECK-DSP-IMM-NEXT: udiv r2, r0, r1 +; CHECK-DSP-IMM-NEXT: mls r0, r2, r1, r0 +; CHECK-DSP-IMM-NEXT: .LBB25_2: @ %cond.end +; CHECK-DSP-IMM-NEXT: movw r1, :lower16:a +; CHECK-DSP-IMM-NEXT: movt r1, :upper16:a +; CHECK-DSP-IMM-NEXT: strb r0, [r1] +; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* @c, align 2 %cmp = icmp eq i16 %0, 0 @@ -584,11 +1787,88 @@ cond.end: ret void } -; CHECK-LABEL: dont_replace_trunc_1 -; CHECK: sxth -; CHECK: uxtb -; CHECK: uxth define i1 @dont_replace_trunc_1(i8* %a, i16* %b, i16* %c, i32* %d, i8* %e, i32* %f) { +; CHECK-NODSP-V8-LABEL: dont_replace_trunc_1: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: push {r4, lr} +; CHECK-NODSP-V8-NEXT: ldrh r1, [r1] +; CHECK-NODSP-V8-NEXT: ldrd r12, lr, [sp, #8] +; CHECK-NODSP-V8-NEXT: sxth r4, r1 +; CHECK-NODSP-V8-NEXT: and r1, r1, #1 +; CHECK-NODSP-V8-NEXT: ldrh r2, [r2] +; CHECK-NODSP-V8-NEXT: str.w r4, [lr] +; CHECK-NODSP-V8-NEXT: strb.w r1, [r12] +; CHECK-NODSP-V8-NEXT: ldrb r0, [r0] +; CHECK-NODSP-V8-NEXT: muls r0, r1, r0 +; CHECK-NODSP-V8-NEXT: uxtb r1, r0 +; CHECK-NODSP-V8-NEXT: orr.w r0, r2, r1 +; CHECK-NODSP-V8-NEXT: uxth r0, r0 +; CHECK-NODSP-V8-NEXT: clz r0, r0 +; CHECK-NODSP-V8-NEXT: lsrs r0, r0, #5 +; CHECK-NODSP-V8-NEXT: str r1, [r3] +; CHECK-NODSP-V8-NEXT: pop {r4, pc} +; +; CHECK-NODSP-V7-LABEL: dont_replace_trunc_1: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: .save {r4, lr} +; CHECK-NODSP-V7-NEXT: push {r4, lr} +; CHECK-NODSP-V7-NEXT: ldrh r1, [r1] +; CHECK-NODSP-V7-NEXT: ldrd lr, r12, [sp, #8] +; CHECK-NODSP-V7-NEXT: ldrh r2, [r2] +; CHECK-NODSP-V7-NEXT: sxth r4, r1 +; CHECK-NODSP-V7-NEXT: and r1, r1, #1 +; CHECK-NODSP-V7-NEXT: str.w r4, [r12] +; CHECK-NODSP-V7-NEXT: strb.w r1, [lr] +; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] +; CHECK-NODSP-V7-NEXT: muls r0, r1, r0 +; CHECK-NODSP-V7-NEXT: uxtb r0, r0 +; CHECK-NODSP-V7-NEXT: str r0, [r3] +; CHECK-NODSP-V7-NEXT: orrs r0, r2 +; CHECK-NODSP-V7-NEXT: uxth r0, r0 +; CHECK-NODSP-V7-NEXT: clz r0, r0 +; CHECK-NODSP-V7-NEXT: lsrs r0, r0, #5 +; CHECK-NODSP-V7-NEXT: pop {r4, pc} +; +; CHECK-DSP-LABEL: dont_replace_trunc_1: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: push {r7, lr} +; CHECK-DSP-NEXT: ldrh r1, [r1] +; CHECK-DSP-NEXT: ldrh.w r12, [r2] +; CHECK-DSP-NEXT: ldr r2, [sp, #12] +; CHECK-DSP-NEXT: sxth.w lr, r1 +; CHECK-DSP-NEXT: and r1, r1, #1 +; CHECK-DSP-NEXT: str.w lr, [r2] +; CHECK-DSP-NEXT: ldr r2, [sp, #8] +; CHECK-DSP-NEXT: strb r1, [r2] +; CHECK-DSP-NEXT: ldrb r0, [r0] +; CHECK-DSP-NEXT: muls r0, r1, r0 +; CHECK-DSP-NEXT: uxtb r0, r0 +; CHECK-DSP-NEXT: str r0, [r3] +; CHECK-DSP-NEXT: orr.w r0, r0, r12 +; CHECK-DSP-NEXT: uxth r0, r0 +; CHECK-DSP-NEXT: clz r0, r0 +; CHECK-DSP-NEXT: lsrs r0, r0, #5 +; CHECK-DSP-NEXT: pop {r7, pc} +; +; CHECK-DSP-IMM-LABEL: dont_replace_trunc_1: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: push {r4, lr} +; CHECK-DSP-IMM-NEXT: ldrd lr, r12, [sp, #8] +; CHECK-DSP-IMM-NEXT: ldrh r1, [r1] +; CHECK-DSP-IMM-NEXT: ldrh r2, [r2] +; CHECK-DSP-IMM-NEXT: sxth r4, r1 +; CHECK-DSP-IMM-NEXT: str.w r4, [r12] +; CHECK-DSP-IMM-NEXT: and r1, r1, #1 +; CHECK-DSP-IMM-NEXT: strb.w r1, [lr] +; CHECK-DSP-IMM-NEXT: ldrb r0, [r0] +; CHECK-DSP-IMM-NEXT: muls r0, r1, r0 +; CHECK-DSP-IMM-NEXT: uxtb r0, r0 +; CHECK-DSP-IMM-NEXT: str r0, [r3] +; CHECK-DSP-IMM-NEXT: orrs r0, r2 +; CHECK-DSP-IMM-NEXT: uxth r0, r0 +; CHECK-DSP-IMM-NEXT: clz r0, r0 +; CHECK-DSP-IMM-NEXT: lsrs r0, r0, #5 +; CHECK-DSP-IMM-NEXT: pop {r4, pc} entry: %0 = load i16, i16* %c, align 2 %1 = load i16, i16* %b, align 2 @@ -607,10 +1887,55 @@ entry: ret i1 %tobool } -; CHECK-LABEL: dont_replace_trunc_2 -; CHECK: cmp -; CHECK: uxtb define i32 @dont_replace_trunc_2(i16* %a, i8* %b) { +; CHECK-NODSP-V8-LABEL: dont_replace_trunc_2: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V8-NEXT: cmp r0, #8 +; CHECK-NODSP-V8-NEXT: it ls +; CHECK-NODSP-V8-NEXT: movls r0, #0 +; CHECK-NODSP-V8-NEXT: ldrb r2, [r1] +; CHECK-NODSP-V8-NEXT: uxtb r0, r0 +; CHECK-NODSP-V8-NEXT: orrs r0, r2 +; CHECK-NODSP-V8-NEXT: strb r0, [r1] +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: dont_replace_trunc_2: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V7-NEXT: ldrb r2, [r1] +; CHECK-NODSP-V7-NEXT: cmp r0, #8 +; CHECK-NODSP-V7-NEXT: it ls +; CHECK-NODSP-V7-NEXT: movls r0, #0 +; CHECK-NODSP-V7-NEXT: uxtb r0, r0 +; CHECK-NODSP-V7-NEXT: orrs r0, r2 +; CHECK-NODSP-V7-NEXT: strb r0, [r1] +; CHECK-NODSP-V7-NEXT: bx lr +; +; CHECK-DSP-LABEL: dont_replace_trunc_2: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrh r0, [r0] +; CHECK-DSP-NEXT: cmp r0, #8 +; CHECK-DSP-NEXT: it ls +; CHECK-DSP-NEXT: movls r0, #0 +; CHECK-DSP-NEXT: ldrb r2, [r1] +; CHECK-DSP-NEXT: uxtb r0, r0 +; CHECK-DSP-NEXT: orrs r0, r2 +; CHECK-DSP-NEXT: strb r0, [r1] +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: dont_replace_trunc_2: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] +; CHECK-DSP-IMM-NEXT: movs r2, #0 +; CHECK-DSP-IMM-NEXT: ldrb r3, [r1] +; CHECK-DSP-IMM-NEXT: cmp r0, #8 +; CHECK-DSP-IMM-NEXT: it hi +; CHECK-DSP-IMM-NEXT: movhi r2, r0 +; CHECK-DSP-IMM-NEXT: uxtb r0, r2 +; CHECK-DSP-IMM-NEXT: orrs r0, r3 +; CHECK-DSP-IMM-NEXT: strb r0, [r1] +; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* %a, align 2 %cmp = icmp ugt i16 %0, 8 @@ -623,10 +1948,77 @@ entry: ret i32 %conv5 } -; CHECK-LABEL: replace_trunk_with_mask -; CHECK: div -; CHECK: uxtb define i32 @replace_trunk_with_mask(i16* %a) { +; CHECK-NODSP-V8-LABEL: replace_trunk_with_mask: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V8-NEXT: cmp r0, #0 +; CHECK-NODSP-V8-NEXT: itt eq +; CHECK-NODSP-V8-NEXT: moveq r0, #0 +; CHECK-NODSP-V8-NEXT: bxeq lr +; CHECK-NODSP-V8-NEXT: movw r1, #535 +; CHECK-NODSP-V8-NEXT: udiv r2, r1, r0 +; CHECK-NODSP-V8-NEXT: mls r0, r2, r0, r1 +; CHECK-NODSP-V8-NEXT: movw r1, #43691 +; CHECK-NODSP-V8-NEXT: uxtb r0, r0 +; CHECK-NODSP-V8-NEXT: movt r1, #43690 +; CHECK-NODSP-V8-NEXT: umull r0, r1, r0, r1 +; CHECK-NODSP-V8-NEXT: lsrs r0, r1, #1 +; CHECK-NODSP-V8-NEXT: bx lr +; +; CHECK-NODSP-V7-LABEL: replace_trunk_with_mask: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: .save {r7, lr} +; CHECK-NODSP-V7-NEXT: push {r7, lr} +; CHECK-NODSP-V7-NEXT: ldrh r1, [r0] +; CHECK-NODSP-V7-NEXT: cbz r1, .LBB28_2 +; CHECK-NODSP-V7-NEXT: @ %bb.1: @ %cond.false +; CHECK-NODSP-V7-NEXT: movw r0, #535 +; CHECK-NODSP-V7-NEXT: bl __aeabi_uidivmod +; CHECK-NODSP-V7-NEXT: uxtb r0, r1 +; CHECK-NODSP-V7-NEXT: movw r1, #43691 +; CHECK-NODSP-V7-NEXT: movt r1, #43690 +; CHECK-NODSP-V7-NEXT: umull r0, r1, r0, r1 +; CHECK-NODSP-V7-NEXT: lsrs r0, r1, #1 +; CHECK-NODSP-V7-NEXT: pop {r7, pc} +; CHECK-NODSP-V7-NEXT: .LBB28_2: +; CHECK-NODSP-V7-NEXT: movs r0, #0 +; CHECK-NODSP-V7-NEXT: pop {r7, pc} +; +; CHECK-DSP-LABEL: replace_trunk_with_mask: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrh r0, [r0] +; CHECK-DSP-NEXT: cmp r0, #0 +; CHECK-DSP-NEXT: itt eq +; CHECK-DSP-NEXT: moveq r0, #0 +; CHECK-DSP-NEXT: bxeq lr +; CHECK-DSP-NEXT: movw r1, #535 +; CHECK-DSP-NEXT: udiv r2, r1, r0 +; CHECK-DSP-NEXT: mls r0, r2, r0, r1 +; CHECK-DSP-NEXT: movw r1, #43691 +; CHECK-DSP-NEXT: uxtb r0, r0 +; CHECK-DSP-NEXT: movt r1, #43690 +; CHECK-DSP-NEXT: umull r0, r1, r0, r1 +; CHECK-DSP-NEXT: lsrs r0, r1, #1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-DSP-IMM-LABEL: replace_trunk_with_mask: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] +; CHECK-DSP-IMM-NEXT: cbz r0, .LBB28_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: @ %cond.false +; CHECK-DSP-IMM-NEXT: movw r1, #535 +; CHECK-DSP-IMM-NEXT: udiv r2, r1, r0 +; CHECK-DSP-IMM-NEXT: mls r0, r2, r0, r1 +; CHECK-DSP-IMM-NEXT: movw r1, #43691 +; CHECK-DSP-IMM-NEXT: movt r1, #43690 +; CHECK-DSP-IMM-NEXT: uxtb r0, r0 +; CHECK-DSP-IMM-NEXT: umull r0, r1, r0, r1 +; CHECK-DSP-IMM-NEXT: lsrs r0, r1, #1 +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .LBB28_2: +; CHECK-DSP-IMM-NEXT: movs r0, #0 +; CHECK-DSP-IMM-NEXT: bx lr entry: %0 = load i16, i16* %a %cmp = icmp eq i16 %0, 0 @@ -644,12 +2036,94 @@ cond.end: ret i32 %cond } -; CHECK-LABEL: test_i8_sitofp -; CHECK: uxtb [[UXT:r[0-9]+]], r1 -; CHECK: sxtb [[SXT:r[0-9]+]], r1 -; CHECK: vmov [[VMOV:s[0-9]+]], [[SXT]] -; CHECK: vcvt.f32.s32 [[CVT:s[0-9]+]], [[VMOV]] define float @test_i8_sitofp(i8* %ptr, i8 %arg) { +; CHECK-NODSP-V8-LABEL: test_i8_sitofp: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldrb r0, [r0] +; CHECK-NODSP-V8-NEXT: uxtb r2, r1 +; CHECK-NODSP-V8-NEXT: cmp r0, r2 +; CHECK-NODSP-V8-NEXT: bne .LBB29_2 +; CHECK-NODSP-V8-NEXT: @ %bb.1: +; CHECK-NODSP-V8-NEXT: vldr s0, .LCPI29_0 +; CHECK-NODSP-V8-NEXT: vmov r0, s0 +; CHECK-NODSP-V8-NEXT: bx lr +; CHECK-NODSP-V8-NEXT: .LBB29_2: @ %if.end +; CHECK-NODSP-V8-NEXT: sxtb r0, r1 +; CHECK-NODSP-V8-NEXT: vmov s0, r0 +; CHECK-NODSP-V8-NEXT: vcvt.f32.s32 s0, s0 +; CHECK-NODSP-V8-NEXT: vmov.f32 s2, #2.000000e+01 +; CHECK-NODSP-V8-NEXT: vdiv.f32 s0, s0, s2 +; CHECK-NODSP-V8-NEXT: vmov r0, s0 +; CHECK-NODSP-V8-NEXT: bx lr +; CHECK-NODSP-V8-NEXT: .p2align 2 +; CHECK-NODSP-V8-NEXT: @ %bb.3: +; CHECK-NODSP-V8-NEXT: .LCPI29_0: +; CHECK-NODSP-V8-NEXT: .long 0 @ float 0 +; +; CHECK-NODSP-V7-LABEL: test_i8_sitofp: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrb r0, [r0] +; CHECK-NODSP-V7-NEXT: uxtb r2, r1 +; CHECK-NODSP-V7-NEXT: cmp r0, r2 +; CHECK-NODSP-V7-NEXT: ittt eq +; CHECK-NODSP-V7-NEXT: vldreq s0, .LCPI29_0 +; CHECK-NODSP-V7-NEXT: vmoveq r0, s0 +; CHECK-NODSP-V7-NEXT: bxeq lr +; CHECK-NODSP-V7-NEXT: sxtb r0, r1 +; CHECK-NODSP-V7-NEXT: vmov.f32 s0, #2.000000e+01 +; CHECK-NODSP-V7-NEXT: vmov s2, r0 +; CHECK-NODSP-V7-NEXT: vcvt.f32.s32 s2, s2 +; CHECK-NODSP-V7-NEXT: vdiv.f32 s0, s2, s0 +; CHECK-NODSP-V7-NEXT: vmov r0, s0 +; CHECK-NODSP-V7-NEXT: bx lr +; CHECK-NODSP-V7-NEXT: .p2align 2 +; CHECK-NODSP-V7-NEXT: @ %bb.1: +; CHECK-NODSP-V7-NEXT: .LCPI29_0: +; CHECK-NODSP-V7-NEXT: .long 0 @ float 0 +; +; CHECK-DSP-LABEL: test_i8_sitofp: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrb r0, [r0] +; CHECK-DSP-NEXT: uxtb r2, r1 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: ittt eq +; CHECK-DSP-NEXT: vldreq s0, .LCPI29_0 +; CHECK-DSP-NEXT: vmoveq r0, s0 +; CHECK-DSP-NEXT: bxeq lr +; CHECK-DSP-NEXT: sxtb r0, r1 +; CHECK-DSP-NEXT: vmov.f32 s0, #2.000000e+01 +; CHECK-DSP-NEXT: vmov s2, r0 +; CHECK-DSP-NEXT: vcvt.f32.s32 s2, s2 +; CHECK-DSP-NEXT: vdiv.f32 s0, s2, s0 +; CHECK-DSP-NEXT: vmov r0, s0 +; CHECK-DSP-NEXT: bx lr +; CHECK-DSP-NEXT: .p2align 2 +; CHECK-DSP-NEXT: @ %bb.1: +; CHECK-DSP-NEXT: .LCPI29_0: +; CHECK-DSP-NEXT: .long 0 @ float 0 +; +; CHECK-DSP-IMM-LABEL: test_i8_sitofp: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldrb r0, [r0] +; CHECK-DSP-IMM-NEXT: uxtb r2, r1 +; CHECK-DSP-IMM-NEXT: cmp r0, r2 +; CHECK-DSP-IMM-NEXT: bne .LBB29_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: +; CHECK-DSP-IMM-NEXT: vldr s0, .LCPI29_0 +; CHECK-DSP-IMM-NEXT: vmov r0, s0 +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .LBB29_2: @ %if.end +; CHECK-DSP-IMM-NEXT: sxtb r0, r1 +; CHECK-DSP-IMM-NEXT: vmov.f32 s0, #2.000000e+01 +; CHECK-DSP-IMM-NEXT: vmov s2, r0 +; CHECK-DSP-IMM-NEXT: vcvt.f32.s32 s2, s2 +; CHECK-DSP-IMM-NEXT: vdiv.f32 s0, s2, s0 +; CHECK-DSP-IMM-NEXT: vmov r0, s0 +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .p2align 2 +; CHECK-DSP-IMM-NEXT: @ %bb.3: +; CHECK-DSP-IMM-NEXT: .LCPI29_0: +; CHECK-DSP-IMM-NEXT: .long 0 @ float 0 entry: %0 = load i8, i8* %ptr, align 1 %cmp = icmp eq i8 %0, %arg @@ -665,12 +2139,94 @@ exit: ret float %res } -; CHECK-LABEL: test_i16_sitofp -; CHECK: uxth [[UXT:r[0-9]+]], r1 -; CHECK: sxth [[SXT:r[0-9]+]], r1 -; CHECK: vmov [[VMOV:s[0-9]+]], [[SXT]] -; CHECK: vcvt.f32.s32 [[CVT:s[0-9]+]], [[VMOV]] define float @test_i16_sitofp(i16* %ptr, i16 %arg) { +; CHECK-NODSP-V8-LABEL: test_i16_sitofp: +; CHECK-NODSP-V8: @ %bb.0: @ %entry +; CHECK-NODSP-V8-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V8-NEXT: uxth r2, r1 +; CHECK-NODSP-V8-NEXT: cmp r0, r2 +; CHECK-NODSP-V8-NEXT: bne .LBB30_2 +; CHECK-NODSP-V8-NEXT: @ %bb.1: +; CHECK-NODSP-V8-NEXT: vldr s0, .LCPI30_0 +; CHECK-NODSP-V8-NEXT: vmov r0, s0 +; CHECK-NODSP-V8-NEXT: bx lr +; CHECK-NODSP-V8-NEXT: .LBB30_2: @ %if.end +; CHECK-NODSP-V8-NEXT: sxth r0, r1 +; CHECK-NODSP-V8-NEXT: vmov s0, r0 +; CHECK-NODSP-V8-NEXT: vcvt.f32.s32 s0, s0 +; CHECK-NODSP-V8-NEXT: vmov.f32 s2, #2.000000e+01 +; CHECK-NODSP-V8-NEXT: vdiv.f32 s0, s0, s2 +; CHECK-NODSP-V8-NEXT: vmov r0, s0 +; CHECK-NODSP-V8-NEXT: bx lr +; CHECK-NODSP-V8-NEXT: .p2align 2 +; CHECK-NODSP-V8-NEXT: @ %bb.3: +; CHECK-NODSP-V8-NEXT: .LCPI30_0: +; CHECK-NODSP-V8-NEXT: .long 0 @ float 0 +; +; CHECK-NODSP-V7-LABEL: test_i16_sitofp: +; CHECK-NODSP-V7: @ %bb.0: @ %entry +; CHECK-NODSP-V7-NEXT: ldrh r0, [r0] +; CHECK-NODSP-V7-NEXT: uxth r2, r1 +; CHECK-NODSP-V7-NEXT: cmp r0, r2 +; CHECK-NODSP-V7-NEXT: ittt eq +; CHECK-NODSP-V7-NEXT: vldreq s0, .LCPI30_0 +; CHECK-NODSP-V7-NEXT: vmoveq r0, s0 +; CHECK-NODSP-V7-NEXT: bxeq lr +; CHECK-NODSP-V7-NEXT: sxth r0, r1 +; CHECK-NODSP-V7-NEXT: vmov.f32 s0, #2.000000e+01 +; CHECK-NODSP-V7-NEXT: vmov s2, r0 +; CHECK-NODSP-V7-NEXT: vcvt.f32.s32 s2, s2 +; CHECK-NODSP-V7-NEXT: vdiv.f32 s0, s2, s0 +; CHECK-NODSP-V7-NEXT: vmov r0, s0 +; CHECK-NODSP-V7-NEXT: bx lr +; CHECK-NODSP-V7-NEXT: .p2align 2 +; CHECK-NODSP-V7-NEXT: @ %bb.1: +; CHECK-NODSP-V7-NEXT: .LCPI30_0: +; CHECK-NODSP-V7-NEXT: .long 0 @ float 0 +; +; CHECK-DSP-LABEL: test_i16_sitofp: +; CHECK-DSP: @ %bb.0: @ %entry +; CHECK-DSP-NEXT: ldrh r0, [r0] +; CHECK-DSP-NEXT: uxth r2, r1 +; CHECK-DSP-NEXT: cmp r0, r2 +; CHECK-DSP-NEXT: ittt eq +; CHECK-DSP-NEXT: vldreq s0, .LCPI30_0 +; CHECK-DSP-NEXT: vmoveq r0, s0 +; CHECK-DSP-NEXT: bxeq lr +; CHECK-DSP-NEXT: sxth r0, r1 +; CHECK-DSP-NEXT: vmov.f32 s0, #2.000000e+01 +; CHECK-DSP-NEXT: vmov s2, r0 +; CHECK-DSP-NEXT: vcvt.f32.s32 s2, s2 +; CHECK-DSP-NEXT: vdiv.f32 s0, s2, s0 +; CHECK-DSP-NEXT: vmov r0, s0 +; CHECK-DSP-NEXT: bx lr +; CHECK-DSP-NEXT: .p2align 2 +; CHECK-DSP-NEXT: @ %bb.1: +; CHECK-DSP-NEXT: .LCPI30_0: +; CHECK-DSP-NEXT: .long 0 @ float 0 +; +; CHECK-DSP-IMM-LABEL: test_i16_sitofp: +; CHECK-DSP-IMM: @ %bb.0: @ %entry +; CHECK-DSP-IMM-NEXT: ldrh r0, [r0] +; CHECK-DSP-IMM-NEXT: uxth r2, r1 +; CHECK-DSP-IMM-NEXT: cmp r0, r2 +; CHECK-DSP-IMM-NEXT: bne .LBB30_2 +; CHECK-DSP-IMM-NEXT: @ %bb.1: +; CHECK-DSP-IMM-NEXT: vldr s0, .LCPI30_0 +; CHECK-DSP-IMM-NEXT: vmov r0, s0 +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .LBB30_2: @ %if.end +; CHECK-DSP-IMM-NEXT: sxth r0, r1 +; CHECK-DSP-IMM-NEXT: vmov.f32 s0, #2.000000e+01 +; CHECK-DSP-IMM-NEXT: vmov s2, r0 +; CHECK-DSP-IMM-NEXT: vcvt.f32.s32 s2, s2 +; CHECK-DSP-IMM-NEXT: vdiv.f32 s0, s2, s0 +; CHECK-DSP-IMM-NEXT: vmov r0, s0 +; CHECK-DSP-IMM-NEXT: bx lr +; CHECK-DSP-IMM-NEXT: .p2align 2 +; CHECK-DSP-IMM-NEXT: @ %bb.3: +; CHECK-DSP-IMM-NEXT: .LCPI30_0: +; CHECK-DSP-IMM-NEXT: .long 0 @ float 0 entry: %0 = load i16, i16* %ptr, align 1 %cmp = icmp eq i16 %0, %arg