From: Ivan Grokhotkov <ivan@espressif.com>
Date: Fri, 8 Dec 2017 05:14:36 +0000 (+0800)
Subject: esp32: fix incorrect clock enable bit name for UART0
X-Git-Tag: v3.1-beta1~540^2~1
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a70522149297b4b254e3bfb43340346ef167114b;p=esp-idf

esp32: fix incorrect clock enable bit name for UART0

Closes https://github.com/espressif/esp-idf/issues/1301
---

diff --git a/components/esp32/clk.c b/components/esp32/clk.c
index 15b8af36c6..4c6209762f 100644
--- a/components/esp32/clk.c
+++ b/components/esp32/clk.c
@@ -187,7 +187,7 @@ void esp_perip_clk_init(void)
         common_perip_clk = DPORT_WDG_CLK_EN |
                               DPORT_I2S0_CLK_EN |
 #if CONFIG_CONSOLE_UART_NUM != 0
-                              DPORT_UART0_CLK_EN |
+                              DPORT_UART_CLK_EN |
 #endif
 #if CONFIG_CONSOLE_UART_NUM != 1
                               DPORT_UART1_CLK_EN |