From: Michael Zuckerman Date: Tue, 1 Mar 2016 13:03:45 +0000 (+0000) Subject: [CLANG][AVX512][BUILTIN] Adding PSRLV builtin X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a6641d44ce63a6b26904bd60cc0621de690b3bdf;p=clang [CLANG][AVX512][BUILTIN] Adding PSRLV builtin Differential Revision: http://reviews.llvm.org/D17718 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@262326 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def index ac7ccdfde1..fb6270548c 100644 --- a/include/clang/Basic/BuiltinsX86.def +++ b/include/clang/Basic/BuiltinsX86.def @@ -1661,6 +1661,13 @@ TARGET_BUILTIN(__builtin_ia32_psllq128_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512 TARGET_BUILTIN(__builtin_ia32_psllq256_mask, "V4LLiV4LLiV2LLiV4LLiUc","","avx512vl") TARGET_BUILTIN(__builtin_ia32_psllqi128_mask, "V2LLiV2LLiiV2LLiUc","","avx512vl") TARGET_BUILTIN(__builtin_ia32_psllqi256_mask, "V4LLiV4LLiiV4LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlv32hi_mask, "V32sV32sV32sV32sUi","","avx512bw") +TARGET_BUILTIN(__builtin_ia32_psrlv16hi_mask, "V16sV16sV16sV16sUs","","avx512bw,avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlv8hi_mask, "V8sV8sV8sV8sUc","","avx512bw,avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlv2di_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlv4di_mask, "V4LLiV4LLiV4LLiV4LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlv4si_mask, "V4iV4iV4iV4iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlv8si_mask, "V8iV8iV8iV8iUc","","avx512vl") #undef BUILTIN #undef TARGET_BUILTIN diff --git a/lib/Headers/avx512bwintrin.h b/lib/Headers/avx512bwintrin.h index 1eda638452..c1523cfa27 100644 --- a/lib/Headers/avx512bwintrin.h +++ b/lib/Headers/avx512bwintrin.h @@ -1718,6 +1718,37 @@ __builtin_ia32_psllwi512_mask ((__v32hi)( __A),( __B),\ (__mmask32)( __U));\ }) + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_srlv_epi16 (__m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_psrlv32hi_mask ((__v32hi) __A, + (__v32hi) __B, + (__v32hi) + _mm512_setzero_hi (), + (__mmask32) -1); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_mask_srlv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, + __m512i __B) +{ + return (__m512i) __builtin_ia32_psrlv32hi_mask ((__v32hi) __A, + (__v32hi) __B, + (__v32hi) __W, + (__mmask32) __U); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_maskz_srlv_epi16 (__mmask32 __U, __m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_psrlv32hi_mask ((__v32hi) __A, + (__v32hi) __B, + (__v32hi) + _mm512_setzero_hi (), + (__mmask32) __U); +} + #undef __DEFAULT_FN_ATTRS #endif diff --git a/lib/Headers/avx512vlbwintrin.h b/lib/Headers/avx512vlbwintrin.h index 831ca8a6d3..8f0a60384c 100644 --- a/lib/Headers/avx512vlbwintrin.h +++ b/lib/Headers/avx512vlbwintrin.h @@ -2593,6 +2593,68 @@ __builtin_ia32_psllwi256_mask ((__v16hi)( __A),( __B),\ (__mmask16)( __U));\ }) + + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_srlv_epi16 (__m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_psrlv16hi_mask ((__v16hi) __A, + (__v16hi) __B, + (__v16hi) + _mm256_setzero_si256 (), + (__mmask16) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_srlv_epi16 (__m256i __W, __mmask16 __U, __m256i __A, + __m256i __B) +{ + return (__m256i) __builtin_ia32_psrlv16hi_mask ((__v16hi) __A, + (__v16hi) __B, + (__v16hi) __W, + (__mmask16) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_srlv_epi16 (__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_psrlv16hi_mask ((__v16hi) __A, + (__v16hi) __B, + (__v16hi) + _mm256_setzero_si256 (), + (__mmask16) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_srlv_epi16 (__m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psrlv8hi_mask ((__v8hi) __A, + (__v8hi) __B, + (__v8hi) + _mm_setzero_hi (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_srlv_epi16 (__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i) __builtin_ia32_psrlv8hi_mask ((__v8hi) __A, + (__v8hi) __B, + (__v8hi) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_srlv_epi16 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psrlv8hi_mask ((__v8hi) __A, + (__v8hi) __B, + (__v8hi) + _mm_setzero_si128 (), + (__mmask8) __U); +} + #undef __DEFAULT_FN_ATTRS #endif /* __AVX512VLBWINTRIN_H */ diff --git a/lib/Headers/avx512vlintrin.h b/lib/Headers/avx512vlintrin.h index 0812cd768c..731d7fe261 100644 --- a/lib/Headers/avx512vlintrin.h +++ b/lib/Headers/avx512vlintrin.h @@ -5556,6 +5556,88 @@ __builtin_ia32_psllv8si_mask ((__v8si)( __X),\ (__mmask8)( __U));\ }) + + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_srlv_epi64 (__m128i __W, __mmask8 __U, __m128i __X, + __m128i __Y) +{ + return (__m128i) __builtin_ia32_psrlv2di_mask ((__v2di) __X, + (__v2di) __Y, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_srlv_epi64 (__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i) __builtin_ia32_psrlv2di_mask ((__v2di) __X, + (__v2di) __Y, + (__v2di) + _mm_setzero_di (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_srlv_epi64 (__m256i __W, __mmask8 __U, __m256i __X, + __m256i __Y) +{ + return (__m256i) __builtin_ia32_psrlv4di_mask ((__v4di) __X, + (__v4di) __Y, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_srlv_epi64 (__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i) __builtin_ia32_psrlv4di_mask ((__v4di) __X, + (__v4di) __Y, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_srlv_epi32 (__m128i __W, __mmask8 __U, __m128i __X, + __m128i __Y) +{ + return (__m128i) __builtin_ia32_psrlv4si_mask ((__v4si) __X, + (__v4si) __Y, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_srlv_epi32 (__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i) __builtin_ia32_psrlv4si_mask ((__v4si) __X, + (__v4si) __Y, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_srlv_epi32 (__m256i __W, __mmask8 __U, __m256i __X, + __m256i __Y) +{ + return (__m256i) __builtin_ia32_psrlv8si_mask ((__v8si) __X, + (__v8si) __Y, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_srlv_epi32 (__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i) __builtin_ia32_psrlv8si_mask ((__v8si) __X, + (__v8si) __Y, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + #undef __DEFAULT_FN_ATTRS #undef __DEFAULT_FN_ATTRS_BOTH diff --git a/test/CodeGen/avx512bw-builtins.c b/test/CodeGen/avx512bw-builtins.c index 8520f969e0..4fceab7058 100644 --- a/test/CodeGen/avx512bw-builtins.c +++ b/test/CodeGen/avx512bw-builtins.c @@ -1167,4 +1167,22 @@ __m512i test_mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A) { return _mm512_maskz_slli_epi16(__U, __A, 5); } +__m512i test_mm512_srlv_epi16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_srlv_epi16 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm512_srlv_epi16(__A, __B); +} + +__m512i test_mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_srlv_epi16 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm512_mask_srlv_epi16(__W, __U, __A, __B); +} + +__m512i test_mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_srlv_epi16 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm512_maskz_srlv_epi16(__U, __A, __B); +} + diff --git a/test/CodeGen/avx512vl-builtins.c b/test/CodeGen/avx512vl-builtins.c index f417aff23e..2901f26120 100644 --- a/test/CodeGen/avx512vl-builtins.c +++ b/test/CodeGen/avx512vl-builtins.c @@ -3732,3 +3732,51 @@ __m256i test_mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) { return _mm256_maskz_sllv_epi32(__U, __X, __Y); } +__m128i test_mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { + // CHECK-LABEL: @test_mm_mask_srlv_epi64 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm_mask_srlv_epi64(__W, __U, __X, __Y); +} + +__m128i test_mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) { + // CHECK-LABEL: @test_mm_maskz_srlv_epi64 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm_maskz_srlv_epi64(__U, __X, __Y); +} + +__m256i test_mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { + // CHECK-LABEL: @test_mm256_mask_srlv_epi64 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm256_mask_srlv_epi64(__W, __U, __X, __Y); +} + +__m256i test_mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) { + // CHECK-LABEL: @test_mm256_maskz_srlv_epi64 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm256_maskz_srlv_epi64(__U, __X, __Y); +} + +__m128i test_mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { + // CHECK-LABEL: @test_mm_mask_srlv_epi32 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm_mask_srlv_epi32(__W, __U, __X, __Y); +} + +__m128i test_mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) { + // CHECK-LABEL: @test_mm_maskz_srlv_epi32 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm_maskz_srlv_epi32(__U, __X, __Y); +} + +__m256i test_mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { + // CHECK-LABEL: @test_mm256_mask_srlv_epi32 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm256_mask_srlv_epi32(__W, __U, __X, __Y); +} + +__m256i test_mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) { + // CHECK-LABEL: @test_mm256_maskz_srlv_epi32 + // CHECK: @llvm.x86.avx512.mask.psrlv + return _mm256_maskz_srlv_epi32(__U, __X, __Y); +} +