From: Nirav Dave <niravd@google.com>
Date: Wed, 21 Jun 2017 20:50:07 +0000 (+0000)
Subject: Add Aarch64 ldst-opt test.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a625ee45de2eef9b8216e25848ce29f5d970edee;p=llvm

Add Aarch64 ldst-opt test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305951 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/AArch64/ldst-opt.ll b/test/CodeGen/AArch64/ldst-opt.ll
index b09fab8d8b4..975e5ae8b95 100644
--- a/test/CodeGen/AArch64/ldst-opt.ll
+++ b/test/CodeGen/AArch64/ldst-opt.ll
@@ -1608,3 +1608,63 @@ entry:
   store <4 x double> zeroinitializer, <4 x double>* %p
   ret void
 }
+
+; Verify that non-consecutive merges do not generate q0
+define void @merge_multiple_128bit_stores(i64* %p) {
+; CHECK-LABEL: merge_multiple_128bit_stores
+; CHECK: // %entry
+; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: stur q0, [x0, #24]
+; NOSTRICTALIGN-NEXT: str q0, [x0, #48]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #24]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #48]
+; CHECK-NEXT: ret
+entry:
+  store i64 0, i64* %p
+  %p1 = getelementptr i64, i64* %p, i64 1
+  store i64 0, i64* %p1
+  %p3 = getelementptr i64, i64* %p, i64 3
+  store i64 0, i64* %p3
+  %p4 = getelementptr i64, i64* %p, i64 4
+  store i64 0, i64* %p4
+  %p6 = getelementptr i64, i64* %p, i64 6
+  store i64 0, i64* %p6
+  %p7 = getelementptr i64, i64* %p, i64 7
+  store i64 0, i64* %p7
+  ret void
+}
+
+; Verify that large stores generate stp q
+define void @merge_multiple_128bit_stores_consec(i64* %p) {
+; CHECK-LABEL: merge_multiple_128bit_stores_consec
+; CHECK: // %entry
+; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}]
+; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}, #32]
+; STRICTALIGN-NEXT: stp	 xzr, xzr, [x0]
+; STRICTALIGN-NEXT: stp	 xzr, xzr, [x0, #16]
+; STRICTALIGN-NEXT: stp	 xzr, xzr, [x0, #32]
+; STRICTALIGN-NEXT: stp  xzr, xzr, [x0, #48]
+; CHECK-NEXT: ret
+entry:
+  store i64 0, i64* %p
+  %p1 = getelementptr i64, i64* %p, i64 1
+  store i64 0, i64* %p1
+  %p2 = getelementptr i64, i64* %p, i64 2
+  store i64 0, i64* %p2
+  %p3 = getelementptr i64, i64* %p, i64 3
+  store i64 0, i64* %p3
+  %p4 = getelementptr i64, i64* %p, i64 4
+  store i64 0, i64* %p4
+  %p5 = getelementptr i64, i64* %p, i64 5
+  store i64 0, i64* %p5
+  %p6 = getelementptr i64, i64* %p, i64 6
+  store i64 0, i64* %p6
+  %p7 = getelementptr i64, i64* %p, i64 7
+  store i64 0, i64* %p7
+  ret void
+}
+
+