From: Evandro Menezes <e.menezes@samsung.com>
Date: Tue, 18 Dec 2018 23:19:55 +0000 (+0000)
Subject: [AArch64] Fix instructions order (NFC)
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a5a5e44a42e3dbb97059440c88e857de2b0a679a;p=llvm

[AArch64] Fix instructions order (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349568 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AArch64/AArch64SchedExynosM1.td b/lib/Target/AArch64/AArch64SchedExynosM1.td
index 62a465048ee..7f1c2d4c764 100644
--- a/lib/Target/AArch64/AArch64SchedExynosM1.td
+++ b/lib/Target/AArch64/AArch64SchedExynosM1.td
@@ -440,13 +440,13 @@ def : InstRW<[M1WriteCOPY], (instrs COPY)>;
 // Miscellaneous instructions.
 
 // Load instructions.
-def : InstRW<[M1WriteLC,
-              ReadAdrBase], (instregex "^LDR(BB|HH|SBW|SBX|SHW|SWX|SW|W|X)roW")>;
-def : InstRW<[M1WriteL5,
-              ReadAdrBase], (instregex "^LDR(BB|HH|SBW|SBX|SHW|SWX|SW|W|X)roX")>;
 def : InstRW<[M1WriteLB,
               WriteLDHi,
               WriteAdr],    (instregex "^LDP(SW|W|X)(post|pre)")>;
+def : InstRW<[M1WriteLC,
+              ReadAdrBase], (instregex "^LDR(BB|SBW|SBX|HH|SHW|SHX|SW|W|X)roW")>;
+def : InstRW<[M1WriteL5,
+              ReadAdrBase], (instregex "^LDR(BB|SBW|SBX|HH|SHW|SHX|SW|W|X)roX")>;
 def : InstRW<[M1WriteLC,
               ReadAdrBase], (instrs PRFMroW)>;
 def : InstRW<[M1WriteL5,