From: James Molloy <james.molloy@arm.com>
Date: Tue, 14 Jun 2016 13:33:07 +0000 (+0000)
Subject: [Thumb] Fix off-by-one error in r272007
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a523293cd962aa6eaf71e62b9a945aec81d05595;p=llvm

[Thumb] Fix off-by-one error in r272007

We can only generate immediates up to #510 with a MOV+ADD, not #511, because there's no such instruction as add #256.

Found by Oliver Stannard and csmith!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272665 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 061c4b79266..4af21748374 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -485,7 +485,7 @@ unsigned ARMDAGToDAGISel::ConstantMaterializationCost(unsigned Val) const {
   if (Subtarget->isThumb()) {
     if (Val <= 255) return 1;                               // MOV
     if (Subtarget->hasV6T2Ops() && Val <= 0xffff) return 1; // MOVW
-    if (Val <= 511) return 2;                               // MOV + ADDi8
+    if (Val <= 510) return 2;                               // MOV + ADDi8
     if (~Val <= 255) return 2;                              // MOV + MVN
     if (ARM_AM::isThumbImmShiftedVal(Val)) return 2;        // MOV + LSL
   } else {
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index e9b49f90ecb..5d4698f6a8b 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -66,11 +66,11 @@ def thumb_immshifted_shamt : SDNodeXForm<imm, [{
   return CurDAG->getTargetConstant(V, SDLoc(N), MVT::i32);
 }]>;
 
-def imm256_511 : ImmLeaf<i32, [{
-  return Imm >= 256 && Imm < 512;
+def imm256_510 : ImmLeaf<i32, [{
+  return Imm >= 256 && Imm < 511;
 }]>;
 
-def thumb_imm256_511_addend : SDNodeXForm<imm, [{
+def thumb_imm256_510_addend : SDNodeXForm<imm, [{
   return CurDAG->getTargetConstant(N->getZExtValue() - 255, SDLoc(N), MVT::i32);
 }]>;
 
@@ -1497,9 +1497,9 @@ def : T1Pat<(i32 thumb_immshifted:$src),
 def : T1Pat<(i32 imm0_255_comp:$src),
             (tMVN (tMOVi8 (imm_comp_XFORM imm:$src)))>;
 
-def : T1Pat<(i32 imm256_511:$src),
+def : T1Pat<(i32 imm256_510:$src),
             (tADDi8 (tMOVi8 255),
-                    (thumb_imm256_511_addend imm:$src))>;
+                    (thumb_imm256_510_addend imm:$src))>;
 
 // Pseudo instruction that combines ldr from constpool and add pc. This should
 // be expanded into two instructions late to allow if-conversion and
diff --git a/test/CodeGen/Thumb/constants.ll b/test/CodeGen/Thumb/constants.ll
index 34c08139602..b1145d7b1d8 100644
--- a/test/CodeGen/Thumb/constants.ll
+++ b/test/CodeGen/Thumb/constants.ll
@@ -9,3 +9,11 @@
 define i32 @mov_and_add() {
   ret i32 267
 }
+
+; CHECK-T1-LABEL: @mov_and_add2
+; CHECK-T2-LABEL: @mov_and_add2
+; CHECK-T1: ldr r0,
+; CHECK-T2: movw r0, #511
+define i32 @mov_and_add2() {
+  ret i32 511
+}