From: Ahmed Bougacha <ahmed.bougacha@gmail.com>
Date: Tue, 21 Mar 2017 23:42:54 +0000 (+0000)
Subject: [GlobalISel] Update DBG_VALUEs referencing DCE'd instructions.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a4a05c5804e30fb172b18d6d11b0b71598a8b209;p=llvm

[GlobalISel] Update DBG_VALUEs referencing DCE'd instructions.

Quentin points out that r298358 would cause us to emit different code
with debug info.  That's a big no-no; also erase the instructions that
only live thanks to DBG_VALUE users.

Adrian explained how this is an existing problem and an OK thing to do:
clang has allocas for all variables so shouldn't be affected at -O0, but
swift uses a bit of inlineasm to explicitly keep values live for the
purpose of debug info quality.  I'm not sure there is a better scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298460 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index 69ad59ade08..26454c1ef00 100644
--- a/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -123,7 +123,7 @@ bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
       // If so, erase it.
       if (isTriviallyDead(MI, MRI)) {
         DEBUG(dbgs() << "Is dead; erasing.\n");
-        MI.eraseFromParent();
+        MI.eraseFromParentAndMarkDBGValuesForRemoval();
         continue;
       }
 
diff --git a/lib/CodeGen/GlobalISel/Utils.cpp b/lib/CodeGen/GlobalISel/Utils.cpp
index 2e2f519ab2b..606a59680a3 100644
--- a/lib/CodeGen/GlobalISel/Utils.cpp
+++ b/lib/CodeGen/GlobalISel/Utils.cpp
@@ -61,8 +61,8 @@ bool llvm::isTriviallyDead(const MachineInstr &MI,
       continue;
 
     unsigned Reg = MO.getReg();
-    // Keep Debug uses live: we don't want to have an effect on debug info.
-    if (TargetRegisterInfo::isPhysicalRegister(Reg) || !MRI.use_empty(Reg))
+    if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
+        !MRI.use_nodbg_empty(Reg))
       return false;
   }
   return true;
diff --git a/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir b/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
index cbc7ec88a67..2f36ec8d2aa 100644
--- a/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
+++ b/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
@@ -3,8 +3,13 @@
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 
-  define void @test_dbg_value() !dbg !5 {
-    ; Keep the dbg metadata live by referencing it in the IR.
+  define void @test_dbg_value(i32 %a) !dbg !5 {
+    %tmp0 = add i32 %a, %a
+    call void @llvm.dbg.value(metadata i32 %tmp0, i64 0, metadata !7, metadata !9), !dbg !10
+    ret void
+  }
+
+  define void @test_dbg_value_dead(i32 %a) !dbg !5 {
     call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !9), !dbg !10
     ret void
   }
@@ -32,16 +37,33 @@
 name:            test_dbg_value
 legalized:       true
 regBankSelected: true
-# CHECK: registers:
-# CHECK-NEXT:  - { id: 0, class: gpr32all }
+body: |
+  bb.0:
+    liveins: %w0
+    %0:gpr(s32) = COPY %w0
+    %1:gpr(s32) = G_ADD %0, %0
+    %w0 = COPY %1(s32)
+
+    ; CHECK:      %0 = COPY %w0
+    ; CHECK-NEXT: %1 = ADDWrr %0, %0
+    ; CHECK-NEXT: %w0 = COPY %1
+    ; CHECK-NEXT: DBG_VALUE debug-use %1, debug-use _, !7, !9, debug-location !10
+
+    DBG_VALUE debug-use %1(s32), debug-use _, !7, !9, debug-location !10
+...
+
+---
+# CHECK-LABEL: name: test_dbg_value_dead
+name:            test_dbg_value_dead
+legalized:       true
+regBankSelected: true
 body: |
   bb.0:
     liveins: %w0
     %0:gpr(s32) = COPY %w0
 
-    ; CHECK: DBG_VALUE debug-use %0, debug-use _, !7, !9, debug-location !10
-    ; CHECK: DBG_VALUE _, 0, !7, !9, debug-location !10
+    ; CHECK-NOT: COPY
+    ; CHECK: DBG_VALUE debug-use _, debug-use _, !7, !9, debug-location !10
 
     DBG_VALUE debug-use %0(s32), debug-use _, !7, !9, debug-location !10
-    DBG_VALUE _, 0, !7, !9, debug-location !10
 ...