From: Evandro Menezes <e.menezes@samsung.com>
Date: Wed, 19 Dec 2018 22:24:36 +0000 (+0000)
Subject: [AArch64] Improve Exynos predicates
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a403dca63b3456dbdbbc555226418812256c7974;p=llvm

[AArch64] Improve Exynos predicates

Expand the predicate `ExynosResetPred` to include all forms of immediate
moves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349686 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AArch64/AArch64SchedPredExynos.td b/lib/Target/AArch64/AArch64SchedPredExynos.td
index f8533d18022..967245bcba4 100644
--- a/lib/Target/AArch64/AArch64SchedPredExynos.td
+++ b/lib/Target/AArch64/AArch64SchedPredExynos.td
@@ -88,12 +88,19 @@ def ExynosResetFn   : TIIPredicate<
                              [ADR, ADRP,
                               MOVNWi, MOVNXi,
                               MOVZWi, MOVZXi],
-                             MCReturnStatement<TruePred>>],
+                             MCReturnStatement<TruePred>>,
+                           MCOpcodeSwitchCase<
+                             [ORRWri, ORRXri],
+                             MCReturnStatement<
+                               CheckAll<
+                                 [CheckIsRegOperand<1>,
+                                  CheckAny<
+                                    [CheckRegOperand<1, WZR>,
+                                     CheckRegOperand<1, XZR>]>]>>>],
                           MCReturnStatement<
                             CheckAny<
                               [IsCopyIdiomFn,
-                               IsZeroFPIdiomFn,
-                               IsZeroIdiomFn]>>>>;
+                               IsZeroFPIdiomFn]>>>>;
 def ExynosResetPred : MCSchedPredicate<ExynosResetFn>;
 
 // Identify EXTR as the alias for ROR (immediate).