From: Sanjay Patel <spatel@rotateright.com>
Date: Thu, 6 Jul 2017 14:15:15 +0000 (+0000)
Subject: [x86] fix over-specified triple and auto-generate checks; NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=a06fc7389158067ebf6081629470909fa765c595;p=llvm

[x86] fix over-specified triple and auto-generate checks; NFC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307262 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/2012-08-16-setcc.ll b/test/CodeGen/X86/2012-08-16-setcc.ll
index c03b923cadb..cba208e62a1 100644
--- a/test/CodeGen/X86/2012-08-16-setcc.ll
+++ b/test/CodeGen/X86/2012-08-16-setcc.ll
@@ -1,45 +1,53 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
 
 ; rdar://12081007
 
-; CHECK-LABEL: and_1:
-; CHECK: andb
-; CHECK-NEXT: cmovnel
-; CHECK: ret
 define i32 @and_1(i8 zeroext %a, i8 zeroext %b, i32 %x) {
+; CHECK-LABEL: and_1:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    andb %dil, %sil
+; CHECK-NEXT:    cmovnel %edx, %eax
+; CHECK-NEXT:    retq
   %1 = and i8 %b, %a
   %2 = icmp ne i8 %1, 0
   %3 = select i1 %2, i32 %x, i32 0
   ret i32 %3
 }
 
-; CHECK-LABEL: and_2:
-; CHECK: andb
-; CHECK-NEXT: setne
-; CHECK: ret
 define zeroext i1 @and_2(i8 zeroext %a, i8 zeroext %b) {
+; CHECK-LABEL: and_2:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    andb %dil, %sil
+; CHECK-NEXT:    setne %al
+; CHECK-NEXT:    retq
   %1 = and i8 %b, %a
   %2 = icmp ne i8 %1, 0
   ret i1 %2
 }
 
-; CHECK-LABEL: xor_1:
-; CHECK: xorb
-; CHECK-NEXT: cmovnel
-; CHECK: ret
 define i32 @xor_1(i8 zeroext %a, i8 zeroext %b, i32 %x) {
+; CHECK-LABEL: xor_1:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    xorb %dil, %sil
+; CHECK-NEXT:    cmovnel %edx, %eax
+; CHECK-NEXT:    retq
   %1 = xor i8 %b, %a
   %2 = icmp ne i8 %1, 0
   %3 = select i1 %2, i32 %x, i32 0
   ret i32 %3
 }
 
-; CHECK-LABEL: xor_2:
-; CHECK: xorb
-; CHECK-NEXT: setne
-; CHECK: ret
 define zeroext i1 @xor_2(i8 zeroext %a, i8 zeroext %b) {
+; CHECK-LABEL: xor_2:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    xorb %dil, %sil
+; CHECK-NEXT:    setne %al
+; CHECK-NEXT:    retq
   %1 = xor i8 %b, %a
   %2 = icmp ne i8 %1, 0
   ret i1 %2
 }
+