From: Eugene Leviant Date: Mon, 9 Jan 2017 11:47:33 +0000 (+0000) Subject: RuntimeDyldELF: add missing test cases for AArch64 X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=9be988aa911bf4bea1df061cfa85237abdf5972c;p=llvm RuntimeDyldELF: add missing test cases for AArch64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291438 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s b/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s index 3ba95e4d394..a9ec0093950 100644 --- a/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s +++ b/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-relocations.s @@ -1,6 +1,11 @@ # RUN: llvm-mc -triple=aarch64_be-none-linux-gnu -filetype=obj -o %T/be-reloc.o %s # RUN: llvm-rtdyld -triple=aarch64_be-none-linux-gnu -verify -dummy-extern f=0x0123456789abcdef -check=%s %T/be-reloc.o + .globl Q + .section .dummy, "ax" +Q: + nop + .text .globl g .p2align 2 @@ -23,8 +28,11 @@ g: .globl k .p2align 3 k: - .xword f + .xword f .size k, 8 +r: +# R_AARCH64_PREL32: use Q instead of f to fit in 32 bits. + .word Q - . # LE instructions read as BE # rtdyld-check: *{4}(g) = 0x6024e0d2 @@ -32,3 +40,4 @@ k: # rtdyld-check: *{4}(g + 8) = 0x6035b1f2 # rtdyld-check: *{4}(g + 12) = 0xe0bd99f2 # rtdyld-check: *{8}k = f +# rtdyld-check: *{4}r = (Q - r)[31:0] diff --git a/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s b/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s index c57234a906e..f9a03ab4066 100644 --- a/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s +++ b/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s @@ -1,6 +1,11 @@ # RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj -o %T/reloc.o %s # RUN: llvm-rtdyld -triple=arm64-none-linux-gnu -verify -dummy-extern f=0x0123456789abcdef -check=%s %T/reloc.o - + + .globl Q + .section .dummy, "ax" +Q: + nop + .text .globl g .p2align 2 @@ -14,6 +19,18 @@ g: movk x0, #:abs_g1_nc:f # R_AARCH64_MOVW_UABS_G0_NC movk x0, #:abs_g0_nc:f +l: +# R_AARCH64_LDST32_ABS_LO12_NC + ldr s4, [x5, :lo12:a] +# R_AARCH64_LDST64_ABS_LO12_NC + ldr x4, [x5, :lo12:a] +p: +# R_AARCH64_ADR_PREL_PG_HI21 +# Test both low and high immediate values + adrp x4, a + 20480 # 16384 + 4096 +# Align next label to 16 bytes, so that LDST immediate +# fields will be non-zero + .align 4 a: # R_AARCH64_ADD_ABS_LO12_NC add x0, x0, :lo12:f @@ -27,13 +44,27 @@ a: .p2align 3 k: .xword f - .size k, 8 + .size k, 16 +r: +# R_AARCH64_PREL32: use Q instead of f to fit in 32 bits. + .word Q - . # rtdyld-check: *{4}(g) = 0xd2e02460 # rtdyld-check: *{4}(g + 4) = 0xf2c8ace0 # rtdyld-check: *{4}(g + 8) = 0xf2b13560 # rtdyld-check: *{4}(g + 12) = 0xf299bde0 + +## Check LDST32_ABS_LO12_NC and LDST64_ABS_LO12_NC +# rtdyld-check: (*{4}l)[21:10] = a[11:2] +# rtdyld-check: (*{4}(l+4))[21:10] = a[11:3] + +## Check ADR_PREL_PG_HI21. Low order bits of immediate value +## go to bits 30:29. High order bits go to bits 23:5 +# rtdyld-check: (*{4}p)[30:29] = (a - p + 20480)[13:12] +# rtdyld-check: (*{4}p)[23:5] = (a - p + 20480)[32:14] + # rtdyld-check: *{8}k = f +# rtdyld-check: *{4}r = (Q - r)[31:0] ## f & 0xFFF = 0xdef (bits 11:0 of f) ## 0xdef << 10 = 0x37bc00