From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sun, 10 Dec 2017 10:08:21 +0000 (+0000)
Subject: [X86] Tag MORESTACK instructions as ret scheduler class
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=9b5897c93f202f92b7f6e0b59dccabd820502b8b;p=llvm

[X86] Tag MORESTACK instructions as ret scheduler class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320296 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td
index 95a18d3f0bf..d70c8be6f3c 100644
--- a/lib/Target/X86/X86InstrCompiler.td
+++ b/lib/Target/X86/X86InstrCompiler.td
@@ -257,15 +257,15 @@ let isPseudo = 1, SchedRW = [WriteSystem] in {
 // This is lowered into a RET instruction by MCInstLower.  We need
 // this so that we don't have to have a MachineBasicBlock which ends
 // with a RET and also has successors.
-let isPseudo = 1 in {
+let isPseudo = 1, SchedRW = [WriteJumpLd] in {
 def MORESTACK_RET: I<0, Pseudo, (outs), (ins),
-                          "", []>;
+                          "", [], IIC_RET>;
 
 // This instruction is lowered to a RET followed by a MOV.  The two
 // instructions are not generated on a higher level since then the
 // verifier sees a MachineBasicBlock ending with a non-terminator.
 def MORESTACK_RET_RESTORE_R10 : I<0, Pseudo, (outs), (ins),
-                                  "", []>;
+                                  "", [], IIC_RET>;
 }
 
 //===----------------------------------------------------------------------===//